Graphene Contact Structures for Low-Resistance 2D TMD ICs
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Solution Overview
Problem
The challenge of high contact resistance when interfacing with two-dimensional (2D) materials such as transition metal dichalcogenides (TMDs) in integrated circuits, particularly at feature sizes below 7 nm, hinders the advancement of semiconductor technology.
Innovation Solution
Employing graphene layers to contact 2D TMDs, utilizing selective growth methods to minimize damage and maintain low contact resistance, combined with appropriate barriers to prevent copper diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional contact methods are used to interface with 2D TMDs, then manufacturing simplicity is maintained, but contact resistance becomes excessively high
Solution Approach 1:
The patent introduces graphene as an intermediary material between copper conductors and 2D TMD channels. The graphene layer serves as a mediator that enables low-resistance electrical contact while preventing copper diffusion into the TMD, thus resolving the contradiction between maintaining simple manufacturing and achieving low contact resistance.
Solution Approach 2:
The contact structure employs a composite material system consisting of copper conductor, graphene contact layer, and optional barrier layers. This composite approach combines the high conductivity of copper with the low contact resistance and chemical stability of graphene, achieving superior electrical performance without significantly complicating the manufacturing process.
2Productivity
If feature sizes are scaled down below 7 nm, then device density and capacity are increased, but contact resistance and performance optimization become increasingly significant challenges
Solution Approach 1:
At scaled dimensions below 7 nm, the graphene intermediary becomes even more critical as it provides a stable interface that maintains low contact resistance despite reduced feature sizes. The graphene layer compensates for the increased significance of contact resistance by providing a chemically stable, low-resistance pathway that is less sensitive to dimensional scaling.
Solution Approach 2:
The patent utilizes parameter changes in the graphene layer, such as controlling its thickness (typically monolayer or few-layer) and adjusting its work function through doping or interface engineering, to optimize contact resistance at scaled dimensions. These parameter adjustments enable the contact structure to maintain performance as feature sizes decrease.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of graphene layers effectively reduces contact resistance, enabling efficient integration of 2D TMDs in advanced semiconductor structures, thereby supporting further miniaturization and performance enhancement of integrated circuits.
Implementation Method 1
a graphene layer, the graphene layer including a first side coupled to the conductor
Implementation Method 2
appropriate barriers to prevent copper diffusion
Data Source
AI summary
Embodiments of the disclosure are directed to advanced integrated circuit (IC) structure fabrication and, in particular, to IC structures with graphene contacts. Other embodiments may be disclosed or claimed.