Graphene-Copper Interconnect Structure for Low-Temperature Conductivity Gains
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Solution Overview
Problem
The challenge in semiconductor manufacturing is scaling down semiconductor devices while maintaining performance and reliability, particularly in forming graphene films on copper interconnects, which requires high temperatures and has challenges with adhesion and conductivity improvements.
Innovation Solution
Incorporating graphene directly into the bulk metal layer or using methods like alternating metal fill with graphene deposition, implanting carbon atoms, or dispersing graphene flakes in copper plating solutions to create hybrid graphene/metal interconnect structures, which enhance conductivity and prevent electromigration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If graphene films are formed on copper interconnects using conventional methods, then conductivity improvement is achieved, but high temperatures are required and adhesion problems occur
Solution Approach 1:
The patent creates a hybrid graphene-metal interconnect structure by integrating graphene elements within the metal layer during the damascene process. This composite approach combines the high conductivity of copper with the superior thermal stability and adhesion properties of graphene, eliminating the need for separate high-temperature graphene deposition while achieving both conductivity improvement and reliable adhesion.
Solution Approach 2:
The patent changes the processing parameters by incorporating graphene during the metal deposition process rather than forming graphene films separately at high temperatures. This parameter change allows graphene integration at lower temperatures while maintaining adhesion through the controlled co-deposition or embedding of graphene elements within the metal matrix during standard semiconductor manufacturing processes.
2Productivity
If device dimensions are scaled down to increase storage capacity and processing speed, then performance is improved, but manufacturing complexity and reliability impact increase
Solution Approach 1:
The patent merges the formation of metal interconnect layers with the incorporation of graphene elements into a single integrated process step. By combining these functions during the damascene metal fill process, the patent eliminates additional processing steps that would increase manufacturing complexity, while the enhanced conductivity of the hybrid structure supports higher processing speeds in scaled devices.
3Reliability
If graphene is integrated into metal layers to improve conductivity, then resistivity reduction is achieved, but electromigration prevention becomes challenging
Solution Approach 1:
The patent applies local quality by creating regions with different compositions within the metal layer - areas with embedded graphene elements for enhanced electromigration resistance and areas with pure metal for optimal conductivity. This spatial variation in material composition allows the interconnect structure to simultaneously achieve low resistivity and high electromigration resistance without requiring perfect uniformity throughout the entire layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These methods improve the conductivity and thermal management of interconnects, reduce resistivity, and prevent copper oxidation, thereby enhancing the performance and reliability of semiconductor devices.
Implementation Method 1
Incorporating graphene directly into the bulk metal layer or using methods like alternating metal fill with graphene deposition, implanting carbon atoms, or dispersing graphene flakes in copper plating solutions to create hybrid graphene/metal interconnect structures, which enhance conductivity
Implementation Method 2
These methods improve the conductivity and thermal management of interconnects
Implementation Method 3
prevent copper oxidation, thereby enhancing the performance and reliability of semiconductor devices
Data Source
AI summary
Material properties of graphene can be leveraged to improve performance of interconnects in an integrated circuit. One way to circumvent challenges involved in depositing graphene onto a copper surface is to incorporate graphene into the bulk metal layer to create a hybrid metal/graphene interconnect structure. Such a hybrid structure can be created instead of, or in addition to, forming a graphene film on the metal surface as a metal capping layer. A first method for embedding graphene into a copper damascene layer is to alternate the metal fill process with graphene deposition to create a composite graphene matrix. A second method is to implant carbon atoms into a surface layer of metal. A third method is to disperse graphene flakes in a damascene copper plating solution to create a distributed graphene matrix. Any combination of these methods can be used to enhance conductivity of the interconnect.