Graphene and Copper Interconnects for Tighter Circuit Pitches
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Solution Overview
Problem
Current integrated circuit technologies face challenges in reducing the size and resistance of wiring and vias, and achieving tighter pitches due to limitations in conventional lithography and metal patterning processes, particularly with the use of copper which lacks volatility and is difficult to pattern using traditional methods.
Innovation Solution
A single or dual damascene interconnect structure is developed using multiple layers of graphene grown with a graphene catalyst via chemical vapor deposition, combined with copper, where graphene forms electrical connections between components and vias, and copper is used to fill trenches with barrier metals to create efficient interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper is used as interconnect metal to improve conductivity, then electrical conductivity is improved, but manufacturing complexity increases due to difficulty in patterning
Solution Approach 1:
The patent introduces a novel copper patterning process using copper chloride solution as an intermediary etchant. The process applies copper chloride solution to selectively remove copper in non-interconnect regions, leaving copper interconnects intact. This intermediary chemical approach enables precise copper patterning without requiring complex lithography, resolving the contradiction between maintaining copper's superior conductivity and achieving manufacturable patterning.
2Ease of manufacture
If conventional lithography is used for metal patterning, then manufacturing process is simple, but wiring size reduction and pitch tightening are limited
Solution Approach 1:
The patent replaces the mechanical/optical lithography system with a chemical self-patterning system. Instead of using light exposure and photoresist to define copper patterns, the invention uses copper chloride solution to chemically et away non-interconnect copper, allowing copper features to self-organize into interconnect patterns. This substitution enables wiring size reduction and pitch tightening beyond conventional lithography limits while maintaining process simplicity.
3Reliability
If graphene is used to improve current carrying capacity and thermal conductivity, then electrical and thermal performance is improved, but production challenges increase
Solution Approach 1:
The patent addresses graphene production challenges by optimizing key parameters including using specific catalyst substrates (copper foil), controlling deposition temperature (900-1100°C), adjusting carbon source flow rates, and selecting appropriate deposition time. These parameter changes transform graphene production from a challenging process into a controlled, repeatable manufacturing process that maintains graphene's superior electrical and thermal conductivity while improving ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of smaller, lower resistance interconnects with tighter pitches, improving energy efficiency and device density in integrated circuits by leveraging graphene's superior conductivity and thermal properties.
Implementation Method 1
The multiple layers of graphene are grown, using a graphene catalyst, from both solid and liquid carbon sources using chemical vapor deposition (CVD) at a temperature between 300° C.-400° C.
Implementation Method 2
The process of applying the copper chloride solution to the copper layer may be repeated one or more times to ensure complete removal of the copper material in the non-interconnect regions.
Data Source
AI summary
A graphene and metal interconnect structure and methods of making the same are disclosed. The graphene is a multiple layer graphene structure that is grown using a graphene catalyst. The graphene forms an electrical connection between two or more VIAs or components, or a combination of VIAs and components. A VIA includes a fill metal, with at least a portion of the fill metal being surrounded by a barrier metal. A component may be a routing track, a clock signal source, a power source, an electromagnetic signal source, a ground terminal, a transistor, a macrocell, or a combination thereof. The graphene is grown, using a graphene catalyst, from both solid and liquid carbon sources using chemical vapor deposition (CVD) at a temperature between 300° C.-400° C. The graphene catalyst can be an elemental form of, or alloy including, nickel, palladium, ruthenium, iridium or copper.