Graphene-Copper Packaging Pads for Low-Resistance Chip Bonding
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Solution Overview
Problem
Conventional semiconductor packaging structures face issues of reduced process yield and interface resistance due to the large difference in thermal expansion coefficients between copper pads and dielectric layers, leading to oxidation and increased resistance at high temperatures during bonding.
Innovation Solution
The use of a graphene-copper composite material for semiconductor packaging pads, where graphene microfilms are dispersed between copper atoms, forming a composite with less than 3 wt% graphene content and oxygen content not exceeding 10 ppm, to stabilize the structure and reduce oxidation and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper pads are used in semiconductor packaging, then good electrical conductivity is achieved, but oxidation occurs at high temperatures during bonding leading to increased resistance and reduced process yield
Solution Approach 1:
The patent applies composite materials by combining copper with graphene to create a copper-graphene composite pad structure. The graphene component (0.1-5 nm thick layer) is integrated with the copper pad, forming a composite structure that leverages the high electrical conductivity of copper while adding the oxidation resistance and thermal stability of graphene. This composite approach directly addresses the oxidation problem during high-temperature bonding while maintaining good electrical conductivity.
Solution Approach 2:
The patent changes the material parameters of the pad structure by introducing graphene with specific thickness parameters (0.1-5 nm) and controlling its integration with copper. This parameter change transforms the pad from pure copper to a copper-graphene composite with enhanced oxidation resistance and thermal stability, while maintaining the electrical conductivity required for functional performance.
2Reliability
If copper pads are used in semiconductor packaging, then good electrical conductivity is achieved, but interface resistance increases due to thermal expansion mismatch with dielectric layers
Solution Approach 1:
The copper-graphene composite pad structure addresses thermal expansion mismatch by incorporating graphene, which has superior thermal stability and dimensional stability. The graphene component acts as a buffer that reduces the stress caused by thermal expansion differences between the copper pad and surrounding dielectric layers during high-temperature bonding processes, thereby reducing interface resistance and improving reliability.
Solution Approach 2:
The patent changes the thermal properties of the pad structure by introducing graphene with specific thermal characteristics. The graphene layer modifies the overall thermal expansion behavior of the pad, creating a composite material with thermal expansion properties that are more compatible with surrounding dielectric layers, thus reducing thermal stress and interface resistance.
3Reliability
If advanced IC processes are used to manufacture chips, then device performance is improved, but the sensitivity to thermal expansion differences and oxidation increases
Solution Approach 1:
The copper-graphene composite pad provides enhanced protection against oxidation and thermal stress for advanced IC devices. The graphene component forms a protective barrier that reduces oxidation susceptibility, while its superior thermal stability protects the sensitive advanced制程 devices from thermal expansion-related damage during bonding and operation, enabling reliable performance of advanced semiconductor devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The graphene-copper composite material provides enhanced stability and reduced resistance, addressing interface resistance and process yield issues by maintaining structural integrity and conductivity under high-temperature bonding conditions.
Implementation Method 1
copper is easily oxidized at high temperatures during bonding, thereby increasing its resistance value
Implementation Method 2
each of the first pads or each of the second pads comprises a graphene-copper composite material composed of graphene and copper
Implementation Method 3
transmit the electronic signals generated by the working area 1303 downward to the lower chip 12
Implementation Method 4
The graphene microfilms have covalent bonds
Implementation Method 5
transmit the electronic signals downward to the circuit board 11 through each of the lower interconnections 122 of the lower chip 12 to transmit the electronic signals to the outside
Data Source
AI summary
An advanced semiconductor packaging structure includes a circuit board, a first chip disposed on the circuit board, and a second chip disposed on the first chip. The first chip has solder balls arranged at intervals and bonded to the circuit board, and first pads arranged at intervals. The second chip has second pads arranged at intervals. Each of the second pads is correspondingly bonded to each of the first pads. Each of the first and second pads comprises a graphene-copper composite material composed of graphene and copper. The graphene has a plurality of graphene microfilms. The graphene microfilms are dispersed and arranged in the gaps between adjacent copper atoms. The graphene microfilms have covalent bonds. Based on the total weight of the graphene-copper composite material, the graphene content is less than 3 wt %, and the oxygen content in the graphene-copper composite material is not greater than 10 ppm.


