Graphene Diffusion-Couple Tool for Low-Temperature Wafer Synthesis
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Solution Overview
Problem
Existing technologies face challenges in synthesizing high-quality graphene or multi-layered graphene over large semiconductor wafers at low temperatures without damaging underlying active devices, particularly in the context of CMOS technology, where BEOL interconnects require a strict thermal budget of <500°C.
Innovation Solution
A scalable diffusion-couple apparatus with independently tunable heating mechanisms and mechanical pressure application, allowing for low-temperature graphene synthesis on large wafers by using a heatable bottom and top disk to maintain uniform temperature and pressure across the substrate, facilitating the migration of carbon atoms through a diffusion couple.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If high-quality graphene is synthesized over large semiconductor wafers, then the area of substrate coverage is improved, but temperature uniformity across the wafer deteriorates
Solution Approach 1:
The heating system is divided into multiple independent heating zones across the wafer surface, with each zone controlled by separate heating elements. This segmentation allows independent temperature control in different regions, enabling uniform temperature distribution across large substrate areas while maintaining the ability to address local variations.
Solution Approach 2:
Different regions of the wafer are provided with tailored heating characteristics through locally-adjustable heating zones. Each zone can be independently tuned to compensate for heat loss patterns, substrate variations, or process requirements in specific areas, ensuring optimal temperature uniformity across the entire large substrate area.
2Object-affected harmful factors
If graphene synthesis is performed at low temperatures to protect underlying devices, then device safety is improved, but synthesis speed deteriorates
Solution Approach 1:
The synthesis process utilizes optimized pressure parameters applied locally to the carbon source layer. By controlling pressure within specific ranges (e.g., 1-100 atm), the carbon diffusion rate through the catalyst layer is enhanced at low temperatures, maintaining synthesis speed while keeping substrate temperature below device damage thresholds.
Solution Approach 2:
A composite catalyst system is employed combining metal layers with specific thicknesses and compositions (e.g., nickel, copper, or their alloys) that exhibit enhanced carbon diffusion properties at low temperatures. The catalyst layer structure is engineered to facilitate rapid carbon atom transport through the metal layer even at temperatures protective of underlying devices.
3Productivity
If mechanical pressure is applied to the diffusion couple, then carbon diffusion rate is improved, but pressure uniformity across the wafer deteriorates
Solution Approach 1:
The pressure application system is divided into multiple independently controlled pressure zones corresponding to different regions of the wafer. Each zone can apply pressure through localized mechanisms such as flexible membranes or pneumatic actuators, enabling uniform pressure distribution across large substrate areas while maintaining the ability to adjust pressure locally if needed.
Solution Approach 2:
A flexible intermediate layer or membrane is introduced between the pressure source and the wafer surface. This intermediary element distributes applied pressure uniformly across the wafer by conforming to surface variations and spreading point or line loads into distributed area loads, ensuring even pressure application across the entire diffusion couple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-quality graphene synthesis on large substrates within the CMOS-compatible thermal budget, ensuring uniformity and avoiding damage to underlying devices, thereby supporting on-chip interconnects and other applications requiring low thermal budgets.
Implementation Method 1
A heatable bottom disk includes a first heating mechanism. The heatable bottom disk is fixed and heatable to a specified temperature. A heatable top disk comprising a second heating mechanism. The heatable top disk is configured to move up and down along an x axis and an x prime axis to apply a mechanical pressure to the wafer on the heatable bottom disk
Implementation Method 2
Solid-phase diffusion of atoms in a 'material stack' forming a 'diffusion-couple' can be leveraged to synthesize high-quality thin-films at relatively low temperatures
Implementation Method 3
Application of appropriate mechanical pressure (65-80 psi) on the carbon source at a relatively low temperature
Data Source
AI summary
In one aspect, a highly scalable diffusion-couple apparatus includes a transfer chamber configured to load a wafer into a process chamber. The process chamber is configured to receive the wafer substrate from the transfer chamber. The process chamber comprises a chamber for growth of a diffusion material on the wafer. A heatable bottom disk includes a first heating mechanism. The heatable bottom disk is fixed and heatable to a specified temperature. The wafer is placed on the heatable bottom disk. A heatable top disk comprising a second heating mechanism. The heatable top disk is configured to move up and down along an x axis and an x prime axis to apply a mechanical pressure to the wafer on the heatable bottom disk. While the heatable top disk applies the mechanical pressure, a chamber pressure is maintained at a specified low value. The first heating mechanism and the second heating mechanism can be independently tuned to any value in the working range.