Graphene Middle Electrode for Low-Roughness Resistive Memory Stacks

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Solution Overview

Problem

Conventional semiconductor devices face issues with manufacturing defects and performance limitations due to the use of middle electrode materials like TiN, which cause surface roughness, damage to selector layers, and increased process time and cost, particularly in magnetic tunnel junction (MTJ) structures.

Innovation Solution

Incorporating graphene as the middle electrode layer between the selector and variable resistance layers, which provides low surface roughness, prevents material diffusion, and allows concurrent etching, reducing process time and cost while improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If TiN is used as the middle electrode material, then electrical conductivity is achieved, but surface roughness increases causing damage to the selector layer

Engineering Contradiction:
Improveselector layer integrityVSAvoidsurface roughness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Graphene is introduced as an intermediary layer between the TiN electrode and the selector layer. This mediator provides a smooth interface that prevents damage to the selector layer while maintaining electrical conductivity, thus resolving the contradiction between achieving conductivity and maintaining surface smoothness.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent uses a composite structure combining TiN and graphene, where TiN provides bulk conductivity and graphene provides a smooth surface interface. This composite approach allows both electrical conductivity and low surface roughness to be achieved simultaneously.

Inventive Principle:
Principle #40Composite materials

2Productivity

If conventional etching processes are used, then material removal is achieved, but process time increases and cost increases

Engineering Contradiction:
Improveetching speedVSAvoidprocess time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent merges the etching of multiple layers (TiN, graphene, and selector layer) into a single concurrent etching process. By using the graphene layer as an etch stop, all layers can be etched simultaneously in one step, significantly reducing process time and increasing productivity.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If multiple separate etching processes are used, then precise control is achieved, but process complexity increases

Engineering Contradiction:
Improveetching controlVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Graphene serves as an etch stop layer that provides precise control in a single etching process. The etch stop property of graphene allows the etching to automatically terminate at the desired depth, maintaining manufacturing precision while reducing process complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If material diffusion occurs, then material mixing happens, but manufacturing defects increase

Engineering Contradiction:
Improvematerial stabilityVSAvoidmanufacturing yield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Graphene acts as a diffusion barrier between different material layers, preventing unwanted material mixing while maintaining ease of manufacture. This intermediary layer ensures material stability and prevents manufacturing defects caused by diffusion.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Graphene's use enhances the performance and yield of variable resistance layers by minimizing surface roughness, preventing material diffusion, and reducing etching damage, thus improving the overall efficiency and reducing manufacturing costs.

Implementation Method 1

Graphene has a low surface roughness, and thus, performance and yield of variable resistance layers may be improved due to the low surface roughness

Methodology Applied
Scientific EffectSurface smoothness:

Implementation Method 2

Graphene may be formed to physically isolate or separate the selector layer and the variable resistance layer from each other

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 3

concurrent etching, reducing process time and cost while improving performance

Methodology Applied
Scientific EffectEtching protection:

Data Source

PatentUS12563976B2Semiconductor device and method for fabricating the same
Publication Date: 2026.02.24 SK HYNIX INC
  • US12563976B2 patent drawing
  • US12563976B2 patent drawing
  • US12563976B2 patent drawing

AI summary

A semiconductor device may include: first conductive lines; second conductive lines disposed on the first conductive lines to be spaced apart from the first conductive lines; selector layer disposed between the first conductive lines and the second conductive lines; a variable resistance layer disposed between the first conductive lines and the second conductive lines; and a first electrode layer including graphene and disposed between the variable resistance layer and the selector layer.