Graphene Electrode Patterns for Semiconductor Device Density

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Solution Overview

Problem

As integrated circuits increase in device density, the reduced line widths of electrode patterns lead to increased specific resistance and deterioration in electrical characteristics, compromising reliability.

Innovation Solution

The implementation of a graphene pattern on semiconductor devices, formed by supplying hydrogen gas and a carbon-containing reaction gas to grow a graphene layer on the electrode patterns, which reduces resistivity and maintains electrical characteristics even with reduced electrode thickness or width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If device density is increased to improve integration, then productivity and area utilization are improved, but specific resistance of electrode patterns increases and electrical characteristics deteriorate

Engineering Contradiction:
Improvedevice densityVSAvoidelectrical characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the material parameter of the electrode pattern from conventional metal to graphene. Graphene's superior electrical conductivity compensates for the increased specific resistance caused by reduced line widths, allowing high device density to be achieved without sacrificing electrical performance

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite material structure by combining graphene with conventional electrode materials or using graphene as a separate conductive layer. This composite approach leverages graphene's excellent electrical properties while maintaining the structural integrity needed for high-density integration

Inventive Principle:
Principle #40Composite materials

2Area of stationary object

If line width of electrode patterns is reduced to increase device density, then area utilization is improved, but specific resistance increases and electrical characteristics deteriorate

Engineering Contradiction:
Improvearea utilizationVSAvoidelectrical characteristics
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent changes the material composition parameter to graphene, which has inherently lower resistivity than conventional metals. This allows the electrode patterns to maintain low specific resistance even when line widths are reduced for higher area utilization

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the conventional metal-based electrical conduction system with a graphene-based system. Graphene's two-dimensional structure and high carrier mobility provide superior electrical conduction that is less sensitive to dimensional reductions, enabling scaled-down electrode patterns without performance loss

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The graphene pattern improves the electrical characteristics of semiconductor devices by reducing resistivity and maintaining performance despite increased integration density, allowing for more efficient and reliable operation.

Implementation Method 1

supplying a hydrogen gas on the electrode layer that couples hydrogen atoms onto a surface of the electrode layer

Methodology Applied
Scientific EffectAdsorption: Adsorption

Implementation Method 2

supplying a carbon-containing reaction gas on the electrode layer that replaces the hydrogen atoms with carbon atoms and growing the graphene layer from the carbon atoms

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Data Source

PatentUS9337149B2Semiconductor devices and methods of fabricating the same
Publication Date: 2016.05.10 SAMSUNG ELECTRONICS CO LTD

AI summary

Semiconductor devices may include a substrate including an active region defined by a device isolation layer, source/drain regions in the active region, word lines extending in a first direction parallel to the active region and being arranged in a second direction crossing the first direction, a bit line pattern extending in the second direction and crossing over a portion of the active region positioned between the word lines, and a graphene pattern covering at least a portion of the bit line pattern.