Graphene Contacts on FinFET Source Drain Regions
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Solution Overview
Problem
The challenge in forming efficient contacts on FinFET devices is the difficulty in controlling the thickness of epi semiconductor material on fins, leading to unintended merger and increased resistance, which traditional metal silicide layers struggle to address effectively.
Innovation Solution
The formation of graphene contacts on source/drain regions of FinFET devices, achieved by growing a thin silicon-carbide epi semiconductor material and thermally decomposing it to form graphene, which reduces the need for metal silicide layers and enhances contact efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional metal silicide layers are used to form contacts on source/drain regions, then contact resistance can be reduced, but the thickness of epi semiconductor material on fins becomes difficult to control, leading to unintended merger and increased resistance
Solution Approach 1:
The patent changes the material parameter from traditional metal silicide to graphene, which has superior electrical conductivity properties. This material substitution resolves the contradiction by providing lower contact resistance without requiring precise thickness control of epi semiconductor material, as graphene forms as a two-dimensional layer with atomic precision naturally
Solution Approach 2:
The patent replaces the mechanical deposition and thickness control process of metal silicide layers with a thermal decomposition process that naturally forms graphene. The thermal decomposition method substitutes the need for precise mechanical thickness control with a self-regulating chemical process that produces uniform graphene layers
2Speed
If the channel length of planar FETs is decreased to improve switching speed, then operating speed increases, but the separation between source and drain regions decreases, making it difficult to inhibit short channel effects
Solution Approach 1:
The patent transitions from planar FET geometry to FinFET three-dimensional structure, adding vertical dimensionality to the device architecture. This dimensional change allows the gate to control the channel from multiple surfaces, maintaining effective control over the channel even when channel length is reduced, thereby preserving reliability while enabling higher switching speeds
3Manufacturing precision
If epi semiconductor material thickness is reduced to prevent fin merger, then unintended merger is prevented, but contact resistance increases due to insufficient material for effective contacts
Solution Approach 1:
The patent employs a composite structure where graphene is formed on top of the epi semiconductor material. This composite approach allows the underlying epi material to maintain sufficient thickness for structural integrity and fin separation, while the graphene layer provides the low-resistance contact interface, thus resolving the contradiction between preventing merger and maintaining low contact resistance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly lowers the electrical resistance of the contacts, improving the overall performance of FinFET devices by eliminating the limitations of traditional metal silicide layers and preventing unintended fin merger.
Implementation Method 1
thermally decomposing it to form graphene
Data Source
AI summary
A FinFET device includes a fin formed in a semiconductor substrate, a gate structure positioned above a portion of the fin, and source and drain regions positioned on opposite sides of the gate structure, wherein the semiconductor substrate includes a first semiconductor material. A silicon-carbide (SiC) semiconductor material is positioned above the fin in the source region and the drain region, wherein the silicon-carbide (SiC) semiconductor material is different from the first semiconductor material. A graphene contact is positioned on and in direct physical contact with the silicon-carbide (SiC) semiconductor material in each of the source region and the drain region, and first and second contact structures are conductively coupled to the graphene contacts in the source region and the drain region, respectively.