Graphene Interconnect Structure With Metal Doping for Low Resistance

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Solution Overview

Problem

As semiconductor industry advances, the increasing density and shrinking dimensions of integrated circuits lead to higher sheet and contact resistance in back-end-of-line (BEOL) interconnection structures, necessitating improved conductive features.

Innovation Solution

The method involves forming a carbon-doped metal layer by dissolving portions of a graphene conductive layer using a metal layer, followed by a plasma-free etch process to pattern the graphene layers, thereby reducing resistivity and maintaining dielectric and conductive feature integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the dimensions of metallic conductive features are reduced to increase density, then the sheet resistance and contact resistance increase

Engineering Contradiction:
Improvedensity of conductive featuresVSAvoidsheet resistance and contact resistance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent changes the material composition of the conductive layer by doping graphene with metal atoms (such as cobalt, nickel, copper, or their alloys). This parameter change in material composition reduces the electrical resistivity of the conductive layer, allowing for reduced feature dimensions without increasing sheet resistance and contact resistance, thus resolving the contradiction between increased density and maintained reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite material by combining graphene with metal atoms or alloys within the conductive layer. This composite structure leverages the high electron mobility of graphene while the metal doping provides additional charge carriers and reduces contact resistance, enabling smaller feature dimensions with maintained or improved electrical performance

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If plasma etching is used to pattern graphene layers, then the underlying dielectric or conductive features are damaged

Engineering Contradiction:
Improvepatterning of graphene layersVSAvoiddamage to dielectric or conductive features
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a metal layer as an intermediary between the graphene conductive layer and the underlying dielectric or conductive features. This metal layer serves as a protective barrier during plasma etching, preventing direct contact between the plasma and the sensitive underlying structures. The metal layer can be selectively removed afterward, having fulfilled its protective function and enabled precise patterning without damage

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies a metal layer to the graphene conductive layer before the plasma etching process. This preliminary action of depositing the metal layer protects the underlying features from plasma damage before the actual patterning occurs. The protective layer is in place beforehand to prevent harmful interactions during the etching process

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces resistivity and enhances the patterning of graphene layers without damaging underlying dielectric or conductive features, improving the performance of interconnection structures in semiconductor devices.

Implementation Method 1

heating the metal layer to dissolve portions of the conductive layer

Methodology Applied
Scientific EffectHeating: Heating

Implementation Method 2

a plasma-free etch process to pattern the graphene layers

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS20240379558A1Interconnection structure and methods of forming the same
Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240379558A1 patent drawing
  • US20240379558A1 patent drawing
  • US20240379558A1 patent drawing

AI summary

An interconnection structure, along with methods of forming such, are described. The interconnection structure includes a first portion of a conductive layer, and the conductive layer includes one or more graphene layers. The first portion of the conductive layer includes a first interface portion and a second interface portion opposite the first interface portion, and each of the first and second interface portion includes a metal disposed between adjacent graphene layers. The structure further includes a second portion of the conductive layer disposed adjacent the first portion of the conductive layer, and the second portion of the conductive layer includes a third interface portion and a fourth interface portion opposite the third interface portion. Each of the third and fourth interface portion includes the metal disposed between adjacent graphene layers. The structure further includes a dielectric material disposed between the first and second portions of the conductive layer.