Graphene Interconnect Structure for Misalignment and Short Isolation

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Solution Overview

Problem

Inadvertent misalignments between conductive features in interconnect structures of integrated circuits lead to increased contact resistance and the risk of short circuits, particularly problematic as technology nodes shrink, affecting device reliability and performance.

Innovation Solution

A graphene layer is formed over conductive features to reduce contact resistance and a selective etch-stop layer is used for proper insulation between conductive features, even when misaligned, ensuring reliable operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conductive features are scaled down to smaller technology nodes, then production efficiency increases and costs decrease, but contact resistance increases due to reduced contact area from misalignments

Engineering Contradiction:
Improveproduction efficiencyVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A graphene layer is introduced as an intermediary material between misaligned conductive features (via and metal line). This graphene layer fills the gap created by misalignment and provides a conductive pathway, thereby reducing contact resistance while allowing continued scaling to smaller technology nodes for improved productivity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If conductive features are scaled down to smaller technology nodes, then production efficiency increases, but the risk of short circuits between uninsulated conductive features increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidshort circuit risk
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The graphene layer serves as an intermediary that not only reduces contact resistance but also provides insulation between adjacent conductive features. This prevents short circuits while enabling continued scaling to smaller nodes, thus maintaining productivity without increasing harmful effects

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If misalignments between conductive features occur, then manufacturing complexity increases, but contact area decreases leading to increased contact resistance

Engineering Contradiction:
Improveprocessing complexityVSAvoidcontact resistance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Instead of treating misalignment as a purely harmful defect that increases complexity, the invention uses the misalignment gap itself as the location for graphene layer deposition. The graphene layer converts the harmful misalignment into a beneficial structure that reduces contact resistance, effectively turning the manufacturing challenge into a solution

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The graphene layer decreases contact resistance and the selective etch-stop layer prevents short circuits, enhancing device reliability and performance by maintaining proper insulation between conductive features, even in cases of misalignment.

Implementation Method 1

The graphene layer decreases contact resistance

Methodology Applied
Scientific EffectElectrical conductivity: Conduction (electrical)

Implementation Method 2

a selective etch-stop layer is used for proper insulation between conductive features

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS20240379559A1Graphene-assisted low-resistance interconnect structures and methods of formation thereof
Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240379559A1 patent drawing
  • US20240379559A1 patent drawing
  • US20240379559A1 patent drawing

AI summary

A semiconductor structure is provided. The semiconductor structure includes a first conductive feature and a second conductive feature disposed in an interlayer dielectric (ILD) layer. The semiconductor structure includes a first graphene layer disposed over the first conductive feature and a second graphene layer disposed over a portion of the second conductive feature. An etch-stop layer (ESL) is horizontally interposed between the first graphene layer and the second graphene layer. A side surface of the first or the second graphene layer directly contacts a side surface of the ESL. A third conductive feature is electrically coupled to the second conductive feature. The third conductive feature is separated from the first graphene layer by a portion of the ESL, and the third conductive feature also directly contacts a top surface of the ESL.