Graphene Interconnects via Patterned Catalyst for LSI Reliability

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Solution Overview

Problem

The miniaturization of LSI wiring structures leads to increased electric resistivity and reliability degradation due to interfacial inelastic scattering of electrons and stress migration, which existing copper-based wiring materials fail to address effectively.

Innovation Solution

A semiconductor device with a graphene layer is developed, where a catalyst layer with specific regions is used to grow graphene interconnects, allowing for low-resistance connections by leveraging the quantized conductance properties of graphene.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If copper is used as wiring material for LSI, then low resistance is achieved, but electric resistivity increases due to interfacial inelastic scattering of electrons in miniaturized structures

Engineering Contradiction:
Improveelectrical performance stabilityVSAvoidinterfacial inelastic scattering of electrons
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter from conventional metal (copper) to graphene, which has fundamentally different electron transport properties. Graphene's two-dimensional structure and linear dispersion relation enable ballistic electron transport with minimal scattering, directly addressing the interfacial inelastic scattering problem in miniaturized LSI wiring structures

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure consisting of a catalyst layer (e.g., cobalt, nickel, or iron) combined with graphene. The catalyst layer serves as both the growth substrate for graphene and an integral part of the interconnect structure, creating a functional composite material that leverages the low-resistance properties of graphene while maintaining structural integrity through the catalyst component

Inventive Principle:
Principle #40Composite materials

2Productivity

If wiring structure is miniaturized to advance LSI fabrication, then integration density increases, but reliability degrades due to stress migration and electro-migration

Engineering Contradiction:
ImproveLSI integration densityVSAvoidwiring structure reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the mechanical and electrical parameters of the wiring material by using graphene instead of copper. Graphene's superior mechanical strength and thermal conductivity, combined with its unique electron transport properties, reduce susceptibility to stress migration and electro-migration, thereby maintaining reliability in miniaturized structures

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent utilizes the catalyst layer (cobalt, nickel, or iron) which can be grown in thin layers and potentially replaced or regenerated, allowing for cost-effective manufacturing of high-performance interconnects that address reliability issues in miniaturized LSI wiring

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Object-affected harmful factors

If graphene is used as wiring material, then quantized conductance and extremely low resistance are achieved, but manufacturing process complexity increases

Engineering Contradiction:
Improveinterconnect resistanceVSAvoidgraphene layer formation process
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces a catalyst layer as an intermediary substance that facilitates graphene growth on the substrate. This catalyst layer (cobalt, nickel, or iron) serves as a medium through which carbon atoms can be deposited and organized into graphene structures, simplifying the overall manufacturing process by providing a controlled growth interface

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs self-organized growth mechanisms where the catalyst layer automatically forms the desired graphene structures under appropriate conditions (temperature, pressure, gas flow). The system self-regulates the graphene formation process, reducing the need for complex external control mechanisms and simplifying manufacturing

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The graphene interconnects reduce interconnect resistance and enhance reliability by utilizing the unique properties of graphene, offering a potential alternative to traditional metallic materials for LSI wiring.

Implementation Method 1

a catalyst layer and a graphene layer provided on the catalyst layer

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Implementation Method 2

quantized conductance (what is called Ballistic conductance) is generated in the graphene, and the graphene is expected to be an extremely low resistance material

Methodology Applied
Scientific EffectBallistic conductance: Conduction (electrical)

Data Source

PatentUS9761531B2Semiconductor device and method of manufacturing the same
Publication Date: 2017.09.12 KIOXIA CORP
  • US9761531B2 patent drawing
  • US9761531B2 patent drawing
  • US9761531B2 patent drawing

AI summary

According to one embodiment, a semiconductor device is disclosed. The device includes interconnects each including a catalyst layer and a graphene layer thereon. The catalyst layer includes a first to fifth catalyst regions arranged along a first direction in order of the first to fifth catalyst regions. The first, third and fifth catalyst regions include upper surfaces higher than those of the second and fourth catalyst regions. Adjacent ones of the first to fifth catalyst regions are in contact with each other. A distance between the first and the third catalyst region and a distance between the third and fifth catalyst region are greater than a mean free path of graphene. The graphene layer includes a first graphene layer on the second catalyst region and a second graphene layer on the fourth catalyst region.