Graphene Layer Patterning With Cooled Inlets and Laser Ablation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for producing graphene-based electronic devices face challenges in achieving fast and low-cost processing of complex structures with high-quality crystal formation and minimal defects, particularly in integrating graphene layers with substrates without physical or chemical bonding, which affects laser interaction and device performance.
Innovation Solution
A method involving a substrate with alternating conductive and insulative layers in a reaction chamber with controlled temperature and precursor flow, followed by selective laser ablation to form and expose graphene layers, allowing for efficient formation of graphene structures with complex geometries and integration with electronic components without damaging the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If pre-formed graphene layers are placed onto silicon dioxide substrates without integral formation, then the substrate preparation is simplified, but the graphene is not physically or chemically bonded to the substrate surface which significantly impacts laser interaction and device performance
Solution Approach 1:
The patent combines the graphene formation process with substrate integration by using silicon carbide wafers that serve dual purposes: as the substrate support and as the carbon source for graphene growth. The silicon carbide layer is both the structural substrate and the precursor material, merging previously separate functions into a single integrated system.
Solution Approach 2:
The silicon carbide layer acts as an intermediary between the substrate and the final graphene structure. It provides a controlled interface where carbon atoms can be released through laser heating to form graphene, mediating the transition from substrate to functional graphene layer while ensuring proper bonding and interaction.
2Manufacturing precision
If conventional CVD methods are used for graphene production, then the crystal quality can be maintained, but the processing time and cost increase significantly
Solution Approach 1:
The silicon carbide wafers are prepared in advance with controlled thickness and doping levels, creating a pre-configured substrate that requires minimal additional processing. The carbon source is already embedded in the substrate structure, eliminating the need for separate precursor delivery systems and reducing processing steps.
Solution Approach 2:
The patent replaces conventional thermal CVD heating with laser-induced selective heating. The laser provides localized, rapid energy delivery that achieves graphene formation faster than conventional furnaces, reducing processing time while maintaining crystal quality through precise control of the heating zone and duration.
3Shape
If laser ablation is used to pattern graphene, then complex geometries can be achieved, but substrate damage may occur if the substrate has low thermal resistance
Solution Approach 1:
The patent employs selective laser heating that acts only on the silicon carbide layer where graphene needs to be formed or removed, leaving the surrounding substrate intact. The laser parameters are optimized to confine thermal effects to the immediate processing zone, enabling precise patterning without propagating damage to the broader substrate structure.
Solution Approach 2:
The patent utilizes controlled variations in laser parameters (wavelength, power, pulse duration) to achieve different outcomes: lower power for in-situ graphene formation, higher power for selective ablation. By dynamically adjusting these parameters, the process achieves complex geometries while preventing substrate damage through precise energy control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the production of high-quality graphene-based electronic devices with improved electrical properties and complex geometries, reducing processing time and costs while minimizing substrate damage, facilitating the creation of devices like Hall sensors with enhanced performance.
Implementation Method 1
heating a substrate held within a reaction chamber to a temperature that is within a decomposition range of a precursor, and that allows graphene formation from a species released from the decomposed precursor
Implementation Method 2
establishing a steep temperature gradient (preferably >1000° C. per meter) that extends away from the substrate surface towards an inlet for the precursor
Implementation Method 3
selectively laser ablating the graphene to expose one or more portions of the surface of the first layer of the substrate
Data Source
AI summary
The present invention provides a method for the production of an electronic device, the method comprising: (i) providing a substrate comprising first and second layers on a heated susceptor in a reaction chamber, the chamber having a plurality of cooled inlets arranged so that, in use, the inlets are distributed across the substrate and have a constant separation from the substrate, (ii) supplying a flow comprising a precursor compound through the inlets and into the reaction chamber to thereby decompose the precursor compound and form a graphene layer structure on a surface of the first layer of the substrate, wherein the inlets are cooled to less than 100° C. and the susceptor is heated to a temperature of at least 50° C. in excess of a decomposition temperature of the precursor, (iii) selectively laser ablating the graphene to expose one or more portions of the surface of the first layer of the substrate, and (iv) selectively laser ablating the surface of the first layer of the substrate to expose one or more portions of the second layer of the substrate, wherein the first layer is an electrically conductive layer and the second layer is an electrically insulative layer, or wherein the second layer is an electrically conductive layer and the first layer is an electrically insulative layer.