Graphene Semiconductor Schottky Barrier Tuning
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Solution Overview
Problem
Conventional semiconductor devices face limitations in temperature range and performance due to fixed Schottky barrier heights, which restrict their operational capabilities in high-temperature and high-frequency applications.
Innovation Solution
Graphite and graphene-based semiconductor devices with doped semimetal stacks that intercalate foreign impurity atoms to tune the Schottky barrier height, enabling adjustable and enhanced performance across various temperature ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional semiconductor devices use fixed Schottky barrier heights, then device structure is simple, but temperature range and performance are limited
Solution Approach 1:
The patent changes the Schottky barrier height parameter by intercalating different foreign impurity atoms (such as alkali metals, alkaline earth metals, or transition metals) between the graphite layers. This allows continuous tuning of the barrier height to optimize device performance for specific temperature ranges and applications, resolving the contradiction between adaptability and fixed structure.
Solution Approach 2:
The invention creates composite structures by combining graphite with doped semimetal stacks. The multilayer composite of graphite and foreign impurity atoms forms a new material system with tunable electronic properties, enabling both structural complexity and enhanced adaptability across different operating conditions.
2Reliability
If Schottky barrier height is fixed, then manufacturing is simple, but rectification and breakdown voltage are limited
Solution Approach 1:
The patent enables control of rectification ratio and breakdown voltage by adjusting the Schottky barrier height through foreign impurity intercalation. Different dopants produce different barrier heights, allowing optimization of electrical characteristics for reliable operation while maintaining a relatively straightforward manufacturing process of depositing and intercalating atomic layers.
3Temperature
If conventional devices operate at standard conditions, then leakage current is acceptable, but high-temperature and high-frequency operation is restricted
Solution Approach 1:
The patent reduces leakage current and enables high-temperature operation by optimizing the Schottky barrier height through foreign impurity doping. The tuned barrier prevents excessive carrier leakage at elevated temperatures while maintaining good electrical contact, thereby enabling both high-temperature stability and high-frequency operation without sacrificing productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The doped graphite and graphene devices exhibit improved rectification, higher breakdown voltage, and lower leakage current, allowing for operation in high-temperature and high-frequency applications with tunable Schottky barrier heights.
Implementation Method 1
doped semimetal stacks that intercalate foreign impurity atoms to tune the Schottky barrier height
Implementation Method 2
doped semimetal stacks that intercalate foreign impurity atoms
Implementation Method 3
tune the Schottky barrier height, enabling adjustable and enhanced performance across various temperature ranges
Data Source
AI summary
Various embodiments are provided for graphite and/or graphene based semiconductor devices. In one embodiment, a semiconductor device includes a semiconductor layer and a semimetal stack. In another embodiment, the semiconductor device includes a semiconductor layer and a zero gap semiconductor layer. The semimetal stack/zero gap semiconductor layer is formed on the semiconductor layer, which forms a Schottky barrier. In another embodiment, a semiconductor device includes first and second semiconductor layers and a semimetal stack. In another embodiment, a semiconductor device includes first and second semiconductor layers and a zero gap semiconductor layer. The first semiconductor layer includes a first semiconducting material and the second semi conductor layer includes a second semiconducting material formed on the first semiconductor layer. The semimetal stack/zero gap semiconductor layer is formed on the second semiconductor layer, which forms a Schottky barrier.


