Self-Aligned Graphene Transistor via Etchant Slots

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Solution Overview

Problem

Current methods for manufacturing self-aligned graphene field-effect transistors (GFETs) are not scalable and often require thin source and drain contacts, which complicates the uniformity of parasitic capacitance in highly-integrated digital applications.

Innovation Solution

A method involving forming a graphene sheet on a substrate, creating slots in the graphene sheet to allow an etchant to pass through, and using the contacts as a mask for anisotropic etching of the substrate to form a self-aligned gate structure with a graphene bridge between source and drain contacts, enabling the deposition of a dual gate structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If current methods are used to form self-aligned GFETs, then uniformity of key parameters such as parasitic capacitance is ensured, but the manufacturing process is not scalable and requires thin source and drain contacts

Engineering Contradiction:
Improveuniformity of parasitic capacitanceVSAvoidscalability of manufacturing process
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The graphene sheet is deposited over the entire substrate including source and drain contacts before the contacts are defined. This preliminary deposition ensures that the graphene automatically aligns with the contacts, eliminating the need for complex alignment steps and enabling scalable manufacturing while maintaining uniformity of parasitic capacitance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Slots are formed in the graphene sheet to allow etchant access to the substrate beneath. This extraction of material (creating openings) enables the etchant to reach and etch the substrate in the gap region, forming the self-aligned gate structure without requiring thin contacts

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of manufacture

If thin source and drain contacts are used, then self-aligned gate structure can be formed, but the uniformity of parasitic capacitance is compromised

Engineering Contradiction:
Improveformation of self-aligned gate structureVSAvoiduniformity of parasitic capacitance
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The graphene sheet serves multiple functions: it acts as the channel material, provides self-alignment through preliminary deposition, and enables etchant access through formed slots. This self-service approach eliminates the need for thin contacts while maintaining self-alignment and uniform parasitic capacitance

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Slots are created in the graphene sheet to make it porous, allowing etchant to pass through and etch the substrate beneath. This porous structure enables the formation of self-aligned gate structures with thick, uniform contacts while maintaining manufacturing precision

Inventive Principle:
Principle #31Porous materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the scalable production of self-aligned GFETs with improved uniformity and reduced parasitic capacitance, enhancing performance for high-frequency RF applications by ensuring precise control over the gate region and reducing the impact of stray charge and adsorbed molecules.

Implementation Method 1

applying the etchant to the substrate through the at least one slot formed in the graphene sheet to etch the substrate

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS8803132B2Self-aligned double-gate graphene transistor
Publication Date: 2014.08.12 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8803132B2 patent drawing
  • US8803132B2 patent drawing
  • US8803132B2 patent drawing

AI summary

A method of fabricating a semiconducting device is disclosed. A graphene sheet is formed on a substrate. At least one slot is formed in the graphene sheet, wherein the at least one slot has a width that allows an etchant to pass through the graphene sheet. An etchant is applied to the substrate through the at least one slot formed in the graphene sheet to etch the substrate.