Graphene Transistor Fabrication on Flat Insulator-Semiconductor Substrates

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Solution Overview

Problem

Current methods for manufacturing graphene transistors fail to fully realize the potential of graphene's electronic properties due to defects and non-uniformities introduced during the manufacturing process, particularly when transferring graphene onto substrates with non-planar surfaces, leading to inconsistent device performance.

Innovation Solution

A method involving a substrate with a substantially flat surface, comprising both insulating and semiconducting regions, where a graphene layer is directly deposited using MOCVD, ensuring a continuous and defect-free interface, and a dielectric layer is formed on the semiconducting region to protect and modulate the graphene, along with source, gate, and drain contacts strategically placed to enhance transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If graphene is transferred onto pre-patterned substrates with non-planar surfaces, then the substrate can be prepared in advance, but the graphene layer becomes non-uniform and defective

Engineering Contradiction:
Improvesubstrate preparationVSAvoidgraphene layer uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

Instead of transferring graphene onto pre-patterned substrates, the patent inverts the process by directly growing graphene on the final substrate using MOCVD. This eliminates the transfer step that causes non-uniformity and defects, while still allowing the substrate to be prepared in advance with insulating and semiconducting regions.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent extracts and removes the problematic transfer step from the manufacturing process. By directly depositing graphene onto the substrate using MOCVD, the method eliminates the intermediate transfer process that introduces defects and non-uniformities, while maintaining the ability to prepare substrates with distinct insulating and semiconducting regions.

Inventive Principle:
Principle #2Taking out (Extraction)

2Manufacturing precision

If graphene is directly deposited on flat substrates, then the graphene layer is uniform and defect-free, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvegraphene layer uniformityVSAvoidmanufacturing process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the substrate preparation and graphene deposition steps into a single integrated process. The substrate is prepared with insulating and semiconducting regions, and graphene is directly grown on the flat surface using MOCVD, combining what were previously separate transfer and deposition steps into one unified manufacturing process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The MOCVD process allows graphene to self-assemble and grow uniformly on the flat substrate surface through controlled chemical vapor deposition. The process inherently produces uniform, defect-free graphene layers without requiring complex transfer operations, as the graphene grows directly in its final position.

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If conventional transfer methods are used, then the manufacturing process is simpler, but the transistor performance is degraded due to defects

Engineering Contradiction:
Improvetransfer processVSAvoidtransistor performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts and eliminates the transfer process entirely from the manufacturing sequence. By directly depositing graphene onto the substrate using MOCVD, the method removes the source of defects and non-uniformities that degrade transistor performance, while maintaining manufacturing feasibility through a streamlined process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the fundamental parameter of how graphene is introduced to the device - from physical transfer to direct chemical vapor deposition. This parameter change eliminates transfer-induced defects and produces uniform, high-quality graphene layers that enable superior transistor performance with higher reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in graphene transistors with improved rectification ratio and tunable work function, offering enhanced electronic properties and reliability by maintaining the integrity of graphene's properties and reducing defects, thus overcoming the limitations of prior art.

Implementation Method 1

a graphene layer is directly deposited using MOCVD

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Data Source

PatentUS12119388B2Graphene transistor and method of manufacturing a graphene transistor
Publication Date: 2024.10.15 PARAGRAF LTD
  • US12119388B2 patent drawing
  • US12119388B2 patent drawing

AI summary

The present invention provides a method of manufacturing a graphene transistor 101, the method comprising: (a) providing a substrate having a substantially flat surface, wherein the surface comprises an insulating region 110 and an adjacent semiconducting region 105; (b) forming a graphene layer structure 115 on the surface, wherein the graphene layer structure is disposed on and across a portion of both the insulating region and the adjacent semiconducting region; (c) forming a layer of dielectric material 120 on a portion of the graphene layer structure which is itself disposed on the semiconducting region 105; and (d) providing: a source contact 125 on a portion of the graphene layer structure which is itself disposed on the insulating region 110; a gate contact 130 on the layer of dielectric material 120 and above a portion of the graphene layer structure which is itself disposed on the semiconducting region 105; and a drain contact 135 on the semiconducting region 105 of the substrate surface.