Graphical Model Resource Sharing Optimizer for Hardware Description
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Solution Overview
Problem
Existing code generation tools for high-level development environments like MATLAB and Simulink struggle to optimize code for hardware implementation, leading to inefficient use of resources such as multipliers and increased latency due to the complexity of handling vector data paths and parallel execution in graphical models.
Innovation Solution
The implementation of a streaming optimizer and resource sharing optimizer that transform vector data paths to scalar or smaller-sized vector paths, replace functionally equivalent blocks with shared nodes, and insert multiplexers, demultiplexers, serializers, and deserializers to optimize code generation, while a delay balancing engine ensures latency alignment, resulting in optimized hardware description code that consumes fewer physical resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If code generation tools handle vector data paths and parallel execution in graphical models, then functionality and computational power are improved, but device complexity and resource consumption increase
Solution Approach 1:
The patent segments vector data paths into multiple scalar data paths, allowing parallel processing while reducing the complexity of individual processing units. By dividing the computational task across multiple simpler scalar paths rather than using complex vector processing units, the system achieves high computational power through parallelism while keeping each processing element simple and manageable.
Solution Approach 2:
The patent merges multiple functionally equivalent blocks into shared resources that can be time-multiplexed. By combining identical processing blocks into a single shared unit that serves multiple functions at different times, the system reduces overall device complexity and resource consumption while maintaining the computational capability needed for vector operations through temporal parallelism.
2Quantity of substance
If code generation tools optimize for hardware implementation, then resource utilization is reduced, but latency increases due to the complexity of optimization transformations
Solution Approach 1:
The patent applies optimization transformations during the code generation phase rather than during runtime execution. By performing resource sharing analysis, vector-to-scalar transformation, and pipeline optimization in advance during model compilation, the system reduces resource utilization in the final hardware implementation without adding runtime overhead that would increase latency. The optimizations are baked into the generated code structure itself.
Solution Approach 2:
The patent introduces dynamic pipeline stages and buffering mechanisms that allow the system to maintain high throughput while using fewer resources. By implementing dynamic data flow management with pipelines and buffers, the system can process data continuously through optimized scalar paths without stalling, thereby reducing latency despite the resource-sharing transformations applied during code generation.
3Quantity of substance
If vector data paths are transformed to scalar data paths, then hardware resource consumption is reduced, but processing speed decreases
Solution Approach 1:
The patent segments vector operations into multiple scalar operations that execute in parallel through pipelined data paths. By dividing a vector processing task into multiple scalar stages processed sequentially through the pipeline, the system achieves the same computational result as vector processing but with reduced hardware resource requirements. The pipeline architecture ensures that processing speed is maintained by keeping the data flow continuous across scalar stages.
Solution Approach 2:
The patent implements continuous data flow through pipelined scalar processing stages, ensuring that the useful action of data processing continues without interruption. By maintaining a steady stream of data through the scalar pipeline with proper buffering and synchronization, the system achieves processing speeds comparable to vector operations while using fewer hardware resources, as each scalar stage is continuously utilized rather than having idle periods.
Data Source
AI summary
A system and method optimizes hardware description generated from a graphical program or model automatically. The system may include a streaming optimizer, a resource sharing optimizer and a delay balancing engine. The streaming optimizer transforms one or more vector data paths in the source model to scalar data paths or to a smaller-sized vector data paths. The resource sharing optimizer may replace multiple blocks of the source model that are functionally equivalent with a single shared block. The streaming and resource sharing optimizers may also configure portions of the modified model to execute at a faster rate. The delay balancing engine may examine the modified model to determine whether any delays or latencies have been introduced. If so, the delay balancing engine may insert one or more blocks into the modified model to correct for any data path misalignment caused by the introduction of the delays or latencies. A validation model, a report, or hardware description code that utilizes fewer hardware resources may be generated from the modified model.