Graphical Programming for Digital Pulse Generation on FPGAs
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Solution Overview
Problem
Traditional text-based programming environments require users to possess advanced programming skills, creating a barrier for non-technical users in efficiently utilizing computer systems, and existing graphical programming environments are often constrained to data flow semantics, limiting their flexibility in creating programs for programmable hardware devices.
Innovation Solution
A method for generating programs using graphical primitives that allow users to select and connect circuit entities to create digital timing signals, with the ability to connect these primitives using wires that do not impose dataflow ordering dependencies, enabling the creation of programs that can be compiled for programmable hardware devices like FPGAs, allowing for more intuitive and flexible programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional text-based programming environments are used, then programming precision and control are improved, but ease of operation deteriorates due to requiring advanced programming skills
Solution Approach 1:
The patent replaces text-based programming syntax with a graphical block diagram interface. Users connect functional blocks representing hardware components and signal processing operations through visual connections rather than writing text code. This substitution of mechanical text input with graphical connection mechanisms maintains programming precision while dramatically improving ease of operation for non-technical users.
Solution Approach 2:
The patent introduces an intermediary translation layer between the graphical block diagram interface and the target hardware. The graphical program is automatically translated into hardware description language (HDL) or configuration code that can be deployed to FPGAs or other programmable devices. This intermediary translation mechanism preserves the precision of the original graphical design while enabling operation with minimal technical expertise.
2Ease of operation
If graphical programming environments with data flow semantics are used, then ease of operation is improved, but adaptability deteriorates due to constraints in creating programs for programmable hardware devices
Solution Approach 1:
The patent creates a universal graphical programming environment that can target multiple hardware platforms including FPGAs, ASICs, and other programmable devices. The same graphical block diagram interface and functional blocks can be adapted to different hardware architectures and deployment scenarios. This multi-functionality maintains ease of operation while significantly improving adaptability to different hardware platforms.
Solution Approach 2:
The patent introduces dynamic configuration capabilities that allow the graphical program to adapt to different hardware resources and constraints. Users can dynamically adjust parameters such as data width, clock frequency, and resource allocation while maintaining the same graphical interface. This dynamic adaptability enables the same graphical programming environment to serve diverse hardware platforms without sacrificing ease of operation.
3Measurement precision
If wires imposing dataflow ordering dependencies are used, then measurement precision of signal timing is improved, but device complexity increases
Solution Approach 1:
The patent applies different connection semantics to different wire types based on local requirements. Timing-critical connections use wires with ordering dependencies to preserve signal timing precision, while non-critical data connections use simpler wires without ordering constraints. This local differentiation of connection qualities maintains measurement precision where needed while reducing overall device complexity by avoiding unnecessary ordering constraints throughout the entire system.
Data Source
AI summary
A system and method for configuring a target hardware device. The system receives user input selecting instances of circuit-like primitives and instances of dataflow primitives. The user may wire the instances together using wires of various kinds to specify a graphical program. The wires are distinguished into types depending on whether or not they impose dataflow ordering dependencies and depending on the kind of data they are intended to carry. The circuit-like primitives may receive and/or generate digital signals to control the timing of processes or events such as A/D conversion, D/A conversion, digital input, digital output, pulse generation, etc. The circuit-like primitives and the dataflow primitives may communicate with each other through cast primitives and satellite nodes. Program code corresponding to the graphical program may be compiled to a format suitable for configuring a programmable hardware element or some other target device.