Graphics Pipeline Data Scheduling via Global Spreader

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Solution Overview

Problem

Current microprocessor architectures face inefficiencies in dynamic scheduling and resource utilization, particularly in MIMD structures with parallel multithread processors, leading to poor allocation and scheduling protocol resolution, which results in decreased performance and idle time in graphics processing applications.

Innovation Solution

A system and method for dynamic scheduling of multiple stream data processing tasks in a parallel processor, utilizing a global spreader and execution blocks with entity descriptor tables, stage parsers, numerical processing units, and data move units to manage graphics data packets, allowing for the simultaneous processing of vertex, triangle, and pixel entities in a logical graphics pipeline.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dynamic scheduling of multiple stream data processing tasks is implemented in a parallel processor, then resource utilization and performance are improved, but device complexity increases due to the need for global spreader, entity descriptor tables, stage parsers, and data move units

Engineering Contradiction:
Improveresource utilizationVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The parallel processor is divided into multiple execution blocks, each capable of independent task execution. The global spreader segments the distribution of graphics data entities to these execution blocks, allowing parallel processing while maintaining manageable complexity through modular organization

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each execution block is designed as a universal processing unit that can handle multiple types of graphics data entities (vertices, triangles, pixels) through the stage parser. This multi-functionality reduces the need for specialized hardware for each entity type, balancing resource utilization with device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If idle processors are assigned to execute threads dynamically, then performance and efficiency are enhanced, but the complexity of scheduling and management protocols increases

Engineering Contradiction:
ImproveperformanceVSAvoidscheduling complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The entity descriptor table automatically tracks the processing state of each graphics data entity, and the global spreader autonomously assigns entities to idle execution blocks based on current processor availability. This self-service mechanism reduces the need for complex external scheduling protocols while maintaining high performance

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system continuously monitors the status of execution blocks and graphics data entities through the entity descriptor table, providing feedback to the global spreader for dynamic task assignment. This feedback loop enables efficient utilization of idle processors without requiring complex centralized control

Inventive Principle:
Principle #23Feedback

3Speed

If multiple graphics data entities are processed simultaneously in parallel execution blocks, then processing speed and throughput are improved, but the difficulty of managing data flow and dependencies increases

Engineering Contradiction:
Improveprocessing speedVSAvoiddata flow management
Core Design Contradiction:
SpeedVSDifficulty of detecting and measuring

Solution Approach 1:

The entity descriptor table serves as an intermediary data structure that tracks the state and dependencies of each graphics data entity. The stage parser acts as a mediator that manages the flow of data between processing stages, simplifying the coordination of parallel operations while maintaining high processing speed

Inventive Principle:
Principle #24Intermediary (Mediator)

4Adaptability or versatility

If the system dynamically creates and schedules multiple logic graphic pipelines in a MIMD structure, then allocation and scheduling protocol resolution are improved, but the device complexity and resource management overhead increase

Engineering Contradiction:
Improveallocation resolutionVSAvoidresource management
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system dynamically creates and configures logic graphic pipelines based on the specific requirements of graphics data entities. The global spreader adaptively assigns entities to execution blocks, and the entity descriptor table dynamically tracks state changes, enabling flexible resource allocation without requiring fixed pipeline structures

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters of execution blocks dynamically based on the type of graphics data entity being processed. The stage parser adjusts processing parameters according to the entity state, allowing versatile allocation and scheduling while managing complexity through parameter-based control rather than structural complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7659899B2System and method to manage data processing stages of a logical graphics pipeline
Publication Date: 2010.02.09 VIA TECH INC
  • US7659899B2 patent drawing
  • US7659899B2 patent drawing
  • US7659899B2 patent drawing

AI summary

A system and method to manage data processing stages of a logical graphics pipeline comprises a number of execution blocks coupled together and to a global spreader that assigns graphics data entities for execution to the execution blocks. Each execution block has an entity descriptor table containing information about an assigned graphics data entity corresponding to allocation of the entity and a current processing stage associated with the entity. Each execution block includes a stage parser configured to establish pointers for the assigned graphics data entity to be processed on a next processing stage. A numerical processing unit is included and configured to execute floating point and integer instructions in association with the assigned graphics data entity. The execution blocks include a data move unit for data loads and moves within the execution block, with the global spreader, and with other execution blocks of the plurality of execution blocks.