Graphics Processor Elementary Function Units for Shader Performance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Graphics processors face performance issues when computing transcendental elementary functions, as current methods relying on arithmetic logic units (ALUs) are inefficient, leading to suboptimal shader performance.
Innovation Solution
A graphics processor design that includes a shader core with ALUs and elementary function units arranged for parallel operation, allowing ALUs to perform arithmetic operations and elementary function units to compute functions concurrently, with a cost-effective implementation that balances performance and resource usage by optimizing the number of elementary function units relative to ALUs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If elementary functions are computed using polynomial expressions evaluated by ALU, then device complexity is reduced, but shader performance deteriorates greatly
Solution Approach 1:
The processing unit is segmented into two distinct functional components: ALUs for arithmetic operations and dedicated elementary function units for computing transcendental functions. This segmentation allows each unit to be optimized for its specific function, with the elementary function units using lookup tables for O(1) complexity operations while ALUs handle polynomial evaluations, thereby resolving the contradiction between device complexity and shader performance
Solution Approach 2:
Lookup tables serve as an intermediary mechanism between the input parameters and the elementary function outputs. The elementary function units query these pre-computed tables to obtain results in constant time, avoiding the need to evaluate complex polynomial expressions during shader execution. This intermediary approach maintains low device complexity while achieving high shader performance
2Productivity
If more elementary function units are added to match the number of ALUs, then shader performance is improved, but device complexity and cost increase
Solution Approach 1:
The system applies local quality by providing dedicated elementary function units only where needed, rather than uniformly matching the number of ALUs. The thread scheduling logic dynamically allocates elementary function units based on the specific shader instructions being executed, allowing the system to optimize performance for elementary function-heavy shaders without unnecessarily increasing device complexity for all shader types
Solution Approach 2:
The number of active elementary function units is made dynamic rather than static. The scheduling logic adjusts the allocation of elementary function units based on the current shader workload and instruction mix, enabling the system to scale its use of complex resources according to actual performance needs while maintaining overall cost-effectiveness
Data Source
AI summary
A graphics processor capable of efficiently performing arithmetic operations and computing elementary functions is described. The graphics processor has at least one arithmetic logic unit (ALU) that can perform arithmetic operations and at least one elementary function unit that can compute elementary functions. The ALU(s) and elementary function unit(s) may be arranged such that they can operate in parallel to improve throughput. The graphics processor may also include fewer elementary function units than ALUs, e.g., four ALUs and a single elementary function unit. The four ALUs may perform an arithmetic operation on (1) four components of an attribute for one pixel or (2) one component of an attribute for four pixels. The single elementary function unit may operate on one component of one pixel at a time. The use of a single elementary function unit may reduce cost while still providing good performance.


