Graphics Processor Source Operand Read Suppression

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Solution Overview

Problem

Modern graphic processors face inefficiencies due to redundant reads from the same register file address, leading to excessive resource consumption in terms of power and bandwidth.

Innovation Solution

The implementation of logic within the graphics processor to suppress redundant read requests and replicate read data across multiple sources with the same register file address, both within and across instructions, thereby reducing redundant operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the graphics processor reads from register file addresses for multiple source operands, then the instruction can be executed with multiple data sources, but redundant reads to the same address increase power consumption and bandwidth usage

Engineering Contradiction:
Improveability to process instructions with multiple data sourcesVSAvoidpower consumption and bandwidth usage
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent merges multiple read requests for the same register file address into a single read operation. The execution unit detects when multiple source operands reference the same register address and combines their read requests, performing only one actual read from the register file while satisfying multiple operand requirements simultaneously. This eliminates redundant reads and reduces power consumption and bandwidth usage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The execution unit performs preliminary detection of redundant read requests before actually executing the reads. By analyzing the source operand addresses in advance and identifying duplicates, the system can prepare to suppress redundant reads, preventing unnecessary power consumption and bandwidth usage before they occur.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the graphics processor performs redundant reads to the same register file address, then all source operands can be satisfied, but resource efficiency decreases

Engineering Contradiction:
Improvecorrectness of data delivery to all sourcesVSAvoidresource efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The execution unit combines multiple read requests targeting the same register file address into a single unified read operation. This ensures that the data is reliably delivered to all required source operands while improving resource efficiency by eliminating duplicate reads. The merged read request maintains data correctness for all sources while reducing the total number of read operations performed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of performing multiple physical reads from the register file, the system performs one read and then copies the retrieved data to multiple destination locations or source operands. This copying mechanism ensures that all source operands receive the correct data while avoiding the inefficiency of redundant reads, thereby maintaining reliability while improving productivity.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10152452B2Source operand read suppression for graphics processors
Publication Date: 2018.12.11 INTEL CORP
  • US10152452B2 patent drawing
  • US10152452B2 patent drawing
  • US10152452B2 patent drawing

AI summary

Techniques to suppress redundant reads to register addresses and to replicate read data are disclosed. The redundant reads are suppressed when multiple source operands specify the same register address to read. Additionally, the read data is replicated to a data stream or data location corresponding to the source operands where the data read was suppressed.