Graphics Processor Tile Block Comparison for Frame Buffer Write Reduction
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Solution Overview
Problem
Current graphics processing systems face challenges in reducing power consumption and memory bandwidth usage during frame buffer operations, particularly due to the high frequency of writing data to external memory and the limitations of existing techniques such as on-chip frame buffers, caching, compression, and dynamic color depth control.
Innovation Solution
A method where the graphics processing system generates output data in blocks, comparing each block to existing data in the output buffer before writing, allowing for the elimination of unnecessary transactions by determining if the block has changed, thereby reducing the number of writes to the frame buffer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If frame buffer operations are performed at high rates (30 frames per second or higher) for high definition graphics, then image quality and display performance are improved, but power consumption and memory bandwidth usage increase significantly
Solution Approach 1:
The patent applies preliminary action by comparing the current frame buffer data with previous frame data before actually writing to the frame buffer. This pre-comparison step identifies unchanged blocks that can be skipped, preventing unnecessary write operations and reducing power consumption while maintaining high definition display performance
Solution Approach 2:
The patent implements partial action by performing frame buffer writes only for blocks that have actually changed, rather than writing entire frames at every refresh cycle. This selective approach reduces the total number of write operations proportionally to the amount of changed content, lowering power consumption while preserving image quality
2Speed
If frame buffer operations are performed at high rates (30 frames per second or higher) for high definition graphics, then display performance is improved, but memory bandwidth usage increases significantly
Solution Approach 1:
The patent uses preliminary comparison of frame buffer blocks before write operations to identify unchanged regions. This pre-screening prevents unnecessary memory bandwidth consumption by avoiding writes to blocks that haven't changed, while still maintaining high display refresh rates for performance-critical applications
Solution Approach 2:
The patent applies local quality by treating different blocks of the frame buffer differently based on their change status. Changed blocks receive full write operations to maintain display performance, while unchanged blocks are skipped to reduce memory bandwidth usage, creating a localized optimization strategy
3Use of energy by moving object
If existing techniques such as on-chip frame buffer, caching, compression, or dynamic color depth control are used, then power consumption is reduced, but device complexity or image quality is compromised
Solution Approach 1:
The patent implements a relatively simple preliminary comparison mechanism that checks whether frame buffer blocks have changed before writing. This approach avoids the complexity of on-chip frame buffers, caching systems, compression logic, or dynamic color depth control while still achieving power consumption reductions through the elimination of redundant write operations
4Use of energy by moving object
If existing techniques such as on-chip frame buffer, caching, compression, or dynamic color depth control are used, then power consumption is reduced, but image quality is compromised
Solution Approach 1:
The patent uses a straightforward comparison method that preserves exact pixel data by only skipping writes when blocks are unchanged. Unlike lossy compression or dynamic color depth control, this approach maintains full image quality for blocks that are written, while reducing power consumption by eliminating redundant writes to unchanged blocks
Data Source
AI summary
A graphics processor 1 includes after its tile rendering logic 40, a transaction elimination unit 5 that includes data block generation logic 41 and block comparison logic 43. The block generation logic 41 generates data blocks from the rendered tiles produced by the tile rendering logic 40. The data blocks are then stored in buffers 42. Comparison logic 43 then compares a new data block with the previous data block (which will already be stored in the buffers 42), and generates an output metadata bit indicating whether the blocks can be considered to be the same or not, on the basis of the comparison. The meta-data output bits are stored appropriately in a meta-data bitmap 45 in main memory 2 that is associated with the output data array in question. If the blocks are determined to be different by the comparison logic then the new data block is written from the buffers 42 to the frame buffer 44 in the main memory 2. On the other hand, if the two blocks are considered to be similar to each other, the new block is not written into the data array in the frame buffer 44.