Graphite Heat Spreader Assembly for Compact Power Electronics Cooling
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Solution Overview
Problem
Power electronic devices, particularly those using silicon-carbide, face challenges in managing heat flux due to their compact device footprint, necessitating improved cooling solutions while maintaining a compact package size.
Innovation Solution
The implementation of a power electronics assembly that includes an S-cell with a first metal layer, a graphite layer, a second metal layer, a solder layer, and an electrically insulating layer, which allows for the embedding of power electronics devices within a circuit board substrate, thereby reducing thermal resistance and package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If power electronic devices are made compact with smaller footprint, then device integration density is improved, but heat flux increases and cooling requirements worsen
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional heat spreading by embedding the power electronic device within a recess in the first metal layer and surrounding it with multiple heat-spreading layers (graphite, second metal layer) that extend in vertical and lateral dimensions, effectively distributing heat flux through additional spatial dimensions
Solution Approach 2:
The patent employs a composite structure consisting of multiple materials with different thermal properties: graphite layer for high in-plane thermal conductivity, metal layers for thermal conduction and structural support, and electrically insulating layers for electrical isolation. This composite approach optimizes heat flux management while maintaining compact dimensions
2Temperature
If cooling requirements are increased for better thermal management, then thermal performance is improved, but package size increases
Solution Approach 1:
The patent merges the electrical insulation function with the thermal management structure by integrating the electrically insulating layer within the S-cell assembly itself, eliminating the need for separate insulation components and reducing overall package volume while maintaining effective thermal conduction paths through the cold plate
Solution Approach 2:
The patent implements a nested structure where the power electronic device is embedded within a recess in the first metal layer, which is surrounded by graphite and second metal layers, which are in turn surrounded by the electrically insulating layer, creating a compact nested assembly that maximizes thermal management within minimal package volume
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces thermal resistance between power electronics devices and a cold plate, enhancing thermal performance and allowing for a more compact package size, suitable for applications in electrified vehicles and other electronic systems.
Implementation Method 1
a first graphite layer bonded to the first metal layer
Data Source
AI summary
Power electronics device assemblies, circuit board assemblies, and power electronics assemblies are disclosed. In one embodiment, a power electronics device assembly includes an S-cell including a first metal layer comprising a first surface having a recess, a first graphite layer bonded to the first metal layer, a second metal layer bonded to the first graphite layer, a solder layer disposed on the second metal layer, and an electrically insulating layer bonded to the solder layer. The power electronics device assembly may further include a power electronics device disposed within the recess of the first surface of the first metal layer.