Monotonic Counter Memory Using Gray Code to Cut Write Switching
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Solution Overview
Problem
Existing monotonic counter systems face challenges in efficiently saving write time and power while writing count values into memory, and in reducing memory array area, especially when dealing with long-term counting and power recovery in financial and electronic systems.
Innovation Solution
A monotonic counter memory system is designed with a counter circuit that increments count by one in response to a clock signal, utilizing a memory circuit with a first memory for storing least significant bits and a second memory for storing most significant bits in Gray code, allowing for efficient bit switching and reduced memory array size by using a bit-rewritable non-volatile or volatile memory that writes count values during power-down states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the count value is written into memory using conventional binary coding, then the memory can store the counting value, but the write time and power consumption increase due to multiple bit changes
Solution Approach 1:
The patent changes the coding parameter from conventional binary to Gray code for representing count values. This parameter change ensures that only one bit changes between consecutive count values, directly reducing write time and power consumption while maintaining the same memory storage capability.
Solution Approach 2:
The patent segments the memory into multiple memory cells, with each cell storing one bit of the count value. This segmentation allows independent control and switching of individual bits, enabling efficient implementation of Gray code where only one memory cell needs to be updated at each counting step.
2Productivity
If the count value is written into memory with frequent bit changes, then the counting value is updated, but the write power consumption increases
Solution Approach 1:
The patent changes the coding parameter from conventional binary to Gray code for representing count values. This parameter change ensures that only one bit changes between consecutive count values, directly reducing write time and power consumption while maintaining the same memory storage capability.
3Area of stationary object
If the memory array size is reduced to save area, then the device size decreases, but the ability to store complete count values is compromised
Solution Approach 1:
The patent changes the coding parameter from conventional binary to Gray code for representing count values. This parameter change ensures that only one bit changes between consecutive count values, directly reducing write time and power consumption while maintaining the same memory storage capability.
Data Source
AI summary
A monotonic counter memory system including a counter circuit and a memory circuit is provided. The counter circuit is configured to increase a count by one in response to a clock signal and output a count value of n bits, where n is a positive integer. The memory circuit includes a plurality of memory cells. The memory circuit is configured to store the count value. The stored count value changes one bit at each input count of the clock signal, and a bit switching time of the stored count value are smaller than 2n−1 times.