Gray Code Event Filter for High-Frequency Count Accuracy
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Solution Overview
Problem
Conventional event filters in synchronous integrated circuits, such as those using binary up/down counters or bi-directional shift registers, face inaccuracies and power consumption issues when tracking high-frequency events due to reset times exceeding clock signal periods, leading to missed counts and shifts.
Innovation Solution
An event filter utilizing a Gray code counter and detection logic that increments and decrements through a Gray code sequence, allowing detection of specific count values without the need for resetting, thereby avoiding missed events and power consumption issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional binary up/down counters or bi-directional shift registers are used to track events, then the event filtering function is provided, but reset times exceed clock signal periods at high frequencies leading to missed counts and shifts
Solution Approach 1:
The patent extracts and eliminates the reset operation from the event filtering mechanism. By using a Gray code counter that continuously counts without reset, the system removes the time-consuming reset phase that caused missed counts in conventional binary counters and shift registers.
Solution Approach 2:
The patent changes the counting parameter from binary code to Gray code. This parameter change allows the counter to transition through states without requiring a reset operation, as Gray code's single-bit transition property enables continuous counting that can be reliably detected even at high clock frequencies.
2Reliability
If conventional event filters are used, then event tracking is provided, but power consumption increases due to continuous resetting operations
Solution Approach 1:
The patent extracts and eliminates the reset operation from the event filtering mechanism. By using a Gray code counter that continuously counts without reset, the system removes the time-consuming reset phase that caused missed counts in conventional binary counters and shift registers.
Solution Approach 2:
The patent implements continuous counting action without interruption. The Gray code counter continuously increments or decrements through its sequence without pausing for reset operations, maintaining uninterrupted event tracking and reducing power consumption by keeping the counting circuit in a stable, continuous operating state.
3Productivity
If conventional binary counters are used, then event counts are tracked, but missed counts occur at high frequencies due to reset time exceeding clock periods
Solution Approach 1:
The patent changes the counting parameter from binary code to Gray code. This parameter change allows the counter to transition through states without requiring a reset operation, as Gray code's single-bit transition property enables continuous counting that can be reliably detected even at high clock frequencies.
Solution Approach 2:
The patent implements continuous counting action without interruption. The Gray code counter continuously increments or decrements through its sequence without pausing for reset operations, maintaining uninterrupted event tracking and reducing power consumption by keeping the counting circuit in a stable, continuous operating state.
Data Source
AI summary
A circuit and method for generating an active output signal in response to detecting N events, which are represented by an event signal. A counter circuit is configured to increment and decrement through a sequence of values in response to the event signal. Detection logic coupled to the counter circuit is configured to detect at least first and second values of the sequence. The detection logic is further configured to generate the active output signal and switch to detecting the second value in response to detecting the first value and generate the active output signal and switch to detecting the first value in response to detecting the second value. The first and second values are separated by N counts.