Nonvolatile Memory Addressing Using Gray Code for Lower Write Power

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Solution Overview

Problem

In machine-to-machine (M2M) systems and sensor networks, nonvolatile memory devices face high power consumption due to the need to rewrite internal addresses after power interruption, which is exacerbated by the conventional use of binary coding that requires multiple bits to be rewritten, leading to increased power usage.

Innovation Solution

The implementation of Gray code addressing reduces the number of bits that need to be rewritten in nonvolatile memory devices, limiting it to a maximum of two bits by incrementing the address by powers of two, thereby minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If binary coding is used for address storage, then the memory device can store data, but the number of bits that need to be rewritten increases, leading to higher power consumption

Engineering Contradiction:
Improvepower consumptionVSAvoidnumber of bits to be rewritten
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The patent changes the addressing parameter from binary coding to Gray code coding. This parameter change ensures that when the address increments, only one bit changes value (from 0 to 1 or from 1 to 0), thereby minimizing the number of bits that need to be rewritten and reducing power consumption during address updates in nonvolatile memory devices.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If internal addresses are rewritten after power interruption, then the memory device can maintain proper addressing, but power consumption increases

Engineering Contradiction:
Improveaddressing accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent applies Gray code encoding to the address parameters stored in nonvolatile memory. This encoding scheme ensures that during address increment operations, only a single bit transitions at a time. Consequently, after power interruptions, when addresses need to be rewritten to maintain proper sequencing, the number of bit writes is minimized to maximum two bits, thereby maintaining addressing reliability while significantly reducing power consumption.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If multiple address lines are charged and discharged during write operations, then data can be written to memory, but power consumption increases

Engineering Contradiction:
Improvedata storage efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent implements Gray code encoding for address parameters, which fundamentally changes how address lines transition during write operations. This parameter change ensures that when moving from one address to the next, only one bit position changes state. As a result, the number of address lines that need to be charged and discharged is minimized to maximum two lines per address transition, maintaining data storage productivity while reducing power consumption associated with address line switching.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9778978B2Memory device and memory system with sensor
Publication Date: 2017.10.03 KIOXIA CORP
  • US9778978B2 patent drawing
  • US9778978B2 patent drawing
  • US9778978B2 patent drawing

AI summary

According to one embodiment, a memory device includes a first address memory storing a first address; a controller which is based on a first interface which transmits a signal serially and outputs a first command in accordance with the first interface; and a memory which stores data in a nonvolatile manner, is based on the first interface, and stores received write data in an address based on the first address when the memory receives the first command.