Nonvolatile Memory Gray Code Addressing for Power Reduction

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Solution Overview

Problem

In machine-to-machine (M2M) systems and sensor networks, nonvolatile memory devices face high power consumption during write processes, particularly when storing measurement data from sensors, as they need to record internal addresses for continued operations, leading to increased power usage.

Innovation Solution

The implementation of a memory system that uses a gray code to minimize the number of bits rewritten in the nonvolatile memory by incrementing the internal address by a power of two, reducing the number of to-be-rewritten bits from 20 to a maximum of 2, thereby lowering power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the nonvolatile memory records internal addresses using conventional binary addressing during write processes, then the memory can continue operations after power restoration, but the power consumption increases due to charging and discharging multiple address lines

Engineering Contradiction:
Improvecontinued operation capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the addressing parameter from conventional binary to gray code representation. This parameter change ensures that only one address line transitions between consecutive addresses, minimizing the number of lines that need to be charged and discharged during write operations while maintaining the ability to track internal addresses for continued operations after power restoration

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the address update process by using a separate gray code counter to generate address sequences independently of the main write operation. This allows the address tracking function to operate with minimal power consumption while the sensor data is being written to memory, resolving the contradiction between maintaining operational continuity and reducing power usage

Inventive Principle:
Principle #1Segmentation

2Productivity

If the memory system uses conventional binary addressing for sensor data storage, then all address bits may need to be rewritten during write operations, but using gray code reduces the number of to-be-rewritten bits from 20 to a maximum of 2

Engineering Contradiction:
Improvewrite operation efficiencyVSAvoidaddressing mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies gray code as the addressing parameter, which fundamentally changes how address transitions occur. In gray code, consecutive values differ by only one bit position, so when writing sequential sensor data, at most one address line needs to be rewritten between consecutive writes. This dramatically improves write operation efficiency while the added complexity of gray code conversion is minimal and can be implemented through simple lookup tables or XOR logic

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9218867B2Memory device and memory system with sensor
Publication Date: 2015.12.22 KIOXIA CORP
  • US9218867B2 patent drawing
  • US9218867B2 patent drawing
  • US9218867B2 patent drawing

AI summary

According to one embodiment, a memory device includes: a nonvolatile memory that stores data according to a write access; an address memory that stores a first address described with a gray code; a first counter that counts up the first address for each write access, generates a second address as the count-up result, and supplies the second address to the nonvolatile memory; a rounding circuit configured to calculate a third address that is equal to or larger than a final output of the first counter and larger than the first address by one or a power of two after a series of write accesses is completed; and a controller that rewrites the third address in the address memory.