Gray Code Timer Transfer with Synchronizer-Based Path Fault Detection

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Solution Overview

Problem

Existing methods for detecting faults in the asynchronous transfer path between a general-purpose timer and CPUs in semiconductor devices for vehicles are ineffective due to increased Hamming distance when error detection codes are added to gray code timer count values, leading to potential capture of invalid data.

Innovation Solution

A semiconductor device with a timer unit that converts binary count values to gray code and a processing unit equipped with a synchronizer and fault detection unit, which captures and synchronizes gray code data with a system clock signal, compares count values to detect faults by ensuring the difference between synchronized count values is within a predetermined threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an error detection code is added to the timer count value converted into gray code for asynchronous transfer, then fault detection capability is improved, but the Hamming distance between adjacent codes increases causing the CPU to capture invalid data

Engineering Contradiction:
Improvefault detection capabilityVSAvoidHamming distance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The fault detection function is segmented into a separate dedicated unit that operates independently from the main data transfer path. The fault detection unit receives separate fault detection data and synchronized gray code data, performing comparison operations independently without interfering with the primary timer count value transmission to CPUs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A synchronizer acts as an intermediary component between the asynchronous timer unit and the processing unit. It synchronizes the gray code data with the system clock signal before it reaches the fault detection unit, ensuring that comparisons are made between valid, synchronized states without introducing Hamming distance issues.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If gray code conversion is used for asynchronous transfer from timer to CPU, then data capture validity is improved, but fault detection capability deteriorates

Engineering Contradiction:
Improvedata capture validityVSAvoidfault detection capability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The gray code conversion function and fault detection capability are merged into an integrated system. The timer unit converts binary count values to gray code while simultaneously providing fault detection data to the fault detection unit, allowing both asynchronous safe transfer and fault detection to coexist without compromising either function.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The fault detection unit is designed with multi-functionality, capable of receiving and processing both the synchronized gray code data from the timer and separate fault detection data. This universal design allows the same unit to perform both data validation and fault detection operations using the inherent properties of gray code without requiring additional separate mechanisms.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11500708B2Semiconductor device and system using the same
Publication Date: 2022.11.15 RENESAS ELECTRONICS CORP
  • US11500708B2 patent drawing
  • US11500708B2 patent drawing
  • US11500708B2 patent drawing

AI summary

A semiconductor device has a timer unit and a processing unit. The timer unit includes a binary counter, a first converter that converts a first count value output from the binary counter to a gray code to output as first gray code data. The processing unit includes a first synchronizer that captures the first gray code data transferred from the timer unit in synchronization with the system clock signal and outputs the captured first gray code data as second gray code data, and a fault detection unit that generates a data for fault detection based on the first gray code data transferred from the timer unit and compares a second count value based on the second gray code data with a third counter value based on the data for fault detection.