Grooved Electrode Structure for Low-Stress Semiconductor Packaging
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Solution Overview
Problem
Existing semiconductor devices with double-sided mounting structures face challenges in reducing stress on semiconductor chips while maintaining heat dissipation performance, especially with the use of Pb-free bonding materials which have higher elasticity and can increase thermal stress.
Innovation Solution
The semiconductor device incorporates a plate-shaped electrode with a groove that penetrates in the thickness direction and reaches the end portion of the electrode, reducing thermal stress on the semiconductor chip and minimizing thermal resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Pb-free bonding materials with higher elasticity are used, then environmental compatibility is improved, but thermal stress on the semiconductor chip increases
Solution Approach 1:
The electrode is designed with a groove that creates a localized stress relief region. This groove structure concentrates the thermal expansion accommodation function in a specific area, allowing the rest of the electrode to maintain good thermal contact with the semiconductor chip while the groove region absorbs thermal stress through deformation.
Solution Approach 2:
The groove structure changes the physical parameters of the electrode by creating a depression that increases compliance. This geometric modification allows the electrode to better accommodate thermal expansion differences between the Pb-free bonding material and the semiconductor chip, reducing thermal stress while maintaining environmental compatibility.
2Power
If the joining area of the electrode is increased, then current carrying capacity is improved, but thermal stress on the semiconductor chip increases
Solution Approach 1:
The groove creates a localized region that handles stress while the surrounding areas maintain bonding function. This allows the overall joining area to be large for high current capacity, while the groove region specifically manages thermal stress through controlled deformation.
Solution Approach 2:
The groove divides the electrode into regions with different functional characteristics. The groove region serves as a stress relief zone while the raised portions maintain electrical and thermal connection, enabling the electrode to simultaneously achieve high current carrying capacity and stress reduction.
3Stress or pressure
If the electrode area bonded to the semiconductor chip is reduced, then thermal stress is reduced, but heat dissipation performance deteriorates
Solution Approach 1:
The groove creates a localized stress relief region while the majority of the electrode surface maintains direct contact with the semiconductor chip for heat dissipation. This local modification reduces stress without significantly impacting the overall heat transfer area.
Solution Approach 2:
The groove acts as an intermediary structure that decouples the stress relief function from the heat dissipation function. It allows the electrode to accommodate thermal expansion while maintaining adequate thermal contact, serving as a mediator between conflicting requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces stress on the semiconductor chip and suppresses the increase in thermal resistance, enhancing the reliability and heat dissipation performance of the semiconductor device.
Implementation Method 1
a groove is formed in the electrode of the surface wiring layer of the module substrate... an effect of reducing a thermal stress caused by a difference in thermal expansion coefficient of a material forming the module substrate
Implementation Method 2
a bonding material that uses Cu or Ag and is sintered at a high temperature
Data Source
AI summary
Provide is a highly reliable semiconductor device in which stress generated in a semiconductor chip is reduced and an increase in thermal resistance is suppressed. The semiconductor device includes: a semiconductor chip including a first main electrode on one surface thereof and a second main electrode and a gate electrode on the other surface thereof; a first electrode connected to the one surface of the semiconductor chip via a first bonding material; and a second electrode connected to the other surface of the semiconductor chip via a second bonding material. The first electrode is a plate-shaped electrode and has a groove in a region overlapping with the semiconductor chip. The groove penetrates in a thickness direction of the first electrode and reaches an end portion of the first electrode when viewed in a plan view.


