Grooved Submount Layout for Compact Semiconductor Packaging

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Solution Overview

Problem

Semiconductor devices face challenges in reducing size while efficiently dissipating heat, as existing configurations often increase device size due to the need for both heat dissipation and electrical connection wiring.

Innovation Solution

A semiconductor device design featuring a submount with a groove and heat dissipation portion on its back surface, where the heat dissipation portion is physically joined to a package substrate using a first joint member, and an electrical connection is established through a separate, insulated end face through channel, allowing for reduced wiring area and size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If wiring for heat dissipation and wiring for electrical connection are provided separately, then heat dissipation efficiency is improved, but device size increases

Engineering Contradiction:

Improveheat dissipation efficiencyVSAvoiddevice size

Core Design Contradiction:

TemperatureVSArea of stationary object

Solution Approach 1:

The heat dissipation portion and electrical connection portion are merged into a single submount structure, allowing both functions to be performed within the same component footprint. The submount integrates the heat dissipation pad and electrical connection terminals without requiring separate dedicated areas, thus achieving efficient heat dissipation while maintaining compact device size.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The submount is segmented into distinct functional regions: a heat dissipation portion for thermal management and an electrical connection portion for signal/power transmission. The groove structure further segments these regions to prevent electrical shorting while maintaining physical proximity, enabling both functions to coexist efficiently within a minimized area.

Inventive Principle:

Principle #1Segmentation

2Area of stationary object

If wiring area for electrical connection is reduced, then device size is reduced, but electrical connection reliability may deteriorate

Engineering Contradiction:

Improvewiring areaVSAvoidelectrical connection reliability

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The submount exhibits local quality differentiation where the electrical connection portion is optimized for electrical performance with appropriate conductive materials and geometry, while the heat dissipation portion is optimized for thermal conduction. This localized optimization ensures reliable electrical connection within a reduced wiring area by concentrating electrical functions in a dedicated region with appropriate material properties.

Inventive Principle:

Principle #3Local quality

3Device complexity

If heat dissipation portion and electrical connection portion are integrated, then manufacturing complexity is reduced, but electrical shorting risk increases

Engineering Contradiction:

Improvemanufacturing complexityVSAvoidelectrical shorting risk

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

The groove structure acts as an intermediary element between the heat dissipation portion and electrical connection portion. It provides physical separation and electrical insulation while maintaining the integrated submount structure, thus preventing electrical shorting without requiring complex multi-layer manufacturing processes. The groove serves as a simple yet effective mediator that resolves the conflict between integration and isolation.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces the semiconductor device's size by separating heat dissipation and electrical connection functions, maintaining efficient heat dissipation while preventing electrical shorts and reducing the wiring area.

Implementation Method 1

The heat dissipation portion is physically joined to the package substrate by a first joint member

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The heat dissipation portion is physically joined to the package substrate by a first joint member

Methodology Applied

Scientific EffectPhysical joining: Welding

Data Source

PatentUS11935806B2Semiconductor device and method for manufacturing semiconductor device

Publication Date: 2024.03.19 NICHIA CORP

AI summary

A semiconductor device includes: a semiconductor element; a submount on which the semiconductor element is mounted, wherein the submount has a first surface on which the semiconductor element is mounted, a second surface located on a side opposite the first surface, and a lateral surface located between the first surface and the second surface, and wherein the submount comprises: a groove located at the second surface, a heat dissipation portion located at the second surface, and an electrode pattern located at the first surface; a package substrate on which the submount is mounted; a first joint member that physically joins the heat dissipation portion to the package substrate; and a connection portion located on the side surface, wherein the connection portion electrically connects the electrode pattern and the package substrate, and the connection portion comprises a second joint member.