Ground-Referenced Bandgap Circuit for Negatively Biased CMOS

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Solution Overview

Problem

Bandgap reference circuits in integrated circuits designed on bulk CMOS processes face challenges when the substrate is biased at a negative potential, as they are typically configured to reference the bandgap voltage to ground potential, and existing solutions do not effectively address this non-ground referenced scenario.

Innovation Solution

A bandgap reference circuit is designed with a current generator, first and second current mirrors, and a reference voltage generator, where the first potential is a negative bias potential, the second potential is a positive supply potential, and the third potential is ground, utilizing PMOS transistors and PNP BJTs to generate a reference voltage referenced to ground, effectively canceling out temperature-dependent voltage components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional bandgap reference circuit is used with a negatively biased substrate, then the circuit can operate with electrostatic discharge protection and enhanced signal quality, but the reference voltage is referenced to the negative substrate potential rather than ground

Engineering Contradiction:
Improveelectrostatic discharge protectionVSAvoidreference voltage reference level
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary circuit stage between the substrate-referenced bandgap core and the ground reference requirement. This intermediary uses level-shifting techniques and additional voltage reference circuits to translate the negative-substrate-referenced voltage to a ground-referenced output, allowing the system to maintain both ESD protection benefits and ground-referenced operation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The reference voltage circuit is divided into separate functional segments: a substrate-referenced bandgap core circuit that generates the initial reference, and a separate ground-referencing stage that converts it to ground potential. This segmentation allows each segment to be optimized for its specific function while working together to solve the overall contradiction

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If vertical PNP transistors are used in bulk CMOS processes, then the layout becomes more compact by sharing diffusion layers with NMOS and PMOS transistors, but the collector is always at substrate potential which prevents ground referencing when substrate is negatively biased

Engineering Contradiction:
Improvelayout areaVSAvoidreference voltage adaptability
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent transitions from a single-dimension substrate-referenced architecture to a multi-dimensional voltage reference architecture by introducing additional voltage translation stages. This allows the circuit to operate with vertical PNP transistors for compactness while adding dimensional complexity in the voltage domain to achieve ground referencing capability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If the substrate is biased at negative potential for electrostatic discharge protection and signal quality enhancement, then reliability and signal quality improve, but existing bandgap circuits cannot provide ground referenced output voltage

Engineering Contradiction:
Improveelectrostatic discharge protectionVSAvoidreference voltage output capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces an intermediary circuit stage between the substrate-referenced bandgap core and the ground reference requirement. This intermediary uses level-shifting techniques and additional voltage reference circuits to translate the negative-substrate-referenced voltage to a ground-referenced output, allowing the system to maintain both ESD protection benefits and ground-referenced operation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent designs a universal ground-referenced bandgap circuit that can operate with negatively biased substrates while maintaining ground-referenced output capability. The circuit incorporates multiple functional elements including substrate-referenced and ground-referenced operation modes, enabling it to serve multiple applications requiring different reference levels

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a stable reference voltage referenced to ground, immune to temperature variations, suitable for applications like hard disk drives, by leveraging the temperature-dependent properties of PMOS transistors and PNP BJTs, ensuring a constant reference voltage across varying temperatures.

Implementation Method 1

Bipolar junction transistors (BJTs) are well suited to this purpose because of their inherent temperature-dependent properties. In particular, the base-emitter voltage of a BJT decreases as temperature increases (a negative temperature coefficient), whereas the voltage difference between the base-emitter voltages of two BJTs operating at different current levels or densities increases as temperature increases (a positive temperature coefficient).

Methodology Applied
Scientific EffectTemperature-dependent voltage characteristics of bipolar junction transistors:

Data Source

PatentUS20240411330A1Ground referenced bandgap circuit in a negatively biased substrate CMOS integrated circuit
Publication Date: 2024.12.12 WESTERN DIGITAL TECHNOLOGIES INC
  • US20240411330A1 patent drawing
  • US20240411330A1 patent drawing
  • US20240411330A1 patent drawing

AI summary

A bandgap reference circuit is disclosed. A current generator is referenced to a first potential and is configured to generate a first current having negative and positive temperature-dependent voltage components. A first current mirror is referenced to the first potential and is configured to receive the first current from the current generator and to generate a second current equal to the first current. A second current mirror is referenced to a second potential and is configured to receive the second current from the first current mirror and to generate a third current equal to the second current. A reference voltage generator is referenced to a third potential and is configured to receive the third current from the second current mirror and to generate a reference voltage that is referenced to the third potential.