Ground Fault Detector With Self-Test Simulation Circuit
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Solution Overview
Problem
Existing Ground Fault Circuit Interrupters (GFCIs) face challenges in meeting increasingly rigorous standards for interrupting power within specified time frames during fault conditions and preventing false interruptions, while also requiring self-testing capabilities to ensure proper operation.
Innovation Solution
The apparatus includes an interruption circuit connected in a power delivery path with a fault detection circuit and a processor that simulates faults to test the response of the fault detection circuit, preventing false interruptions and ensuring compliance with UL standards through selective control of the interruption circuit and fault simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the GFCI continuously monitors and immediately interrupts power upon detecting a fault, then safety response time is improved, but false interruptions increase due to noise or transient conditions
Solution Approach 1:
The system performs preliminary self-tests by simulating fault conditions before normal operation to ensure the fault detection circuit is functioning correctly. This preliminary action prevents false interruptions by verifying system readiness and detecting potential issues before they cause incorrect fault detection during normal operation.
Solution Approach 2:
The processor monitors the response of the fault detection circuit to simulated faults and uses this feedback to determine whether the circuit is operating correctly. This feedback mechanism allows the system to distinguish between actual faults and false alarm conditions, preventing inappropriate power interruptions.
2Reliability
If the GFCI implements self-testing capabilities to ensure proper operation, then reliability is improved, but device complexity increases due to additional circuits and processing
Solution Approach 1:
The fault simulation circuit serves multiple functions: it generates test signals for self-diagnosis, simulates actual fault conditions for testing the detection circuit, and enables the processor to verify system operation. This multi-functionality reduces the need for separate dedicated test components, thereby limiting the increase in device complexity while maintaining reliability improvements.
Solution Approach 2:
The GFCI performs self-diagnosis and self-testing using its own internal fault simulation circuit and processor, without requiring external testing equipment or additional manual intervention. This self-service capability ensures reliable operation verification while minimizing added complexity by using existing system resources.
3Reliability
If the processor provides override signals to prevent interruption during simulated faults, then false interruptions are reduced, but the system requires additional control logic increasing complexity
Solution Approach 1:
The fault simulation control logic is merged with the existing processor and fault detection circuitry. The processor integrates the functionality of generating override signals during self-test periods with its existing role of monitoring fault conditions and controlling power interruption. This merging approach prevents false interruptions while minimizing the increase in control logic complexity by utilizing existing processing resources.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively interrupts power during fault conditions while preventing false interruptions and ensures the GFCI meets rigorous standards by accurately simulating faults and testing the detection circuit's response, enhancing reliability and safety.
Implementation Method 1
a sensing coil configured to sense a differential current between the phase conductive path and the neutral conductive path
Data Source
AI summary
An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.