Ground Select Transistor Programming Method
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory device programming methods for cells connected to a ground selection line are inefficient due to the need for verification operations that distinguish between pass and fail cells, leading to unnecessary voltage applications and potential short paths between bit lines.
Innovation Solution
A programming method that applies a program voltage and verify voltage to ground selection lines without utilizing the verification result, treating all cells as program cells until threshold voltage levels reach a reference level, thereby omitting the verification operation and preventing short paths by maintaining a consistent voltage difference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If verification operations are performed to distinguish between pass and fail cells, then programming accuracy is improved, but programming time and operational complexity increase
Solution Approach 1:
The patent extracts and removes the verification operation from the programming process for ground selection line cells. By eliminating the verification step that distinguishes between pass and fail cells, the method reduces programming time and operational complexity while maintaining sufficient programming accuracy through continuous programming of all cells until threshold voltage reaches the reference level.
Solution Approach 2:
Instead of the conventional approach of programming only fail cells after verification, this patent inverts the logic by continuously programming all cells (both pass and fail) without verification. The inversion eliminates the need to distinguish between cell types, thereby removing the verification step entirely while still achieving accurate threshold voltage distribution.
2Manufacturing precision
If verification operations are performed to distinguish between pass and fail cells, then programming accuracy is improved, but device complexity increases
Solution Approach 1:
The patent extracts and removes the verification operation from the programming process for ground selection line cells. By eliminating the verification step that distinguishes between pass and fail cells, the method reduces programming time and operational complexity while maintaining sufficient programming accuracy through continuous programming of all cells until threshold voltage reaches the reference level.
Solution Approach 2:
Instead of the conventional approach of programming only fail cells after verification, this patent inverts the logic by continuously programming all cells (both pass and fail) without verification. The inversion eliminates the need to distinguish between cell types, thereby removing the verification step entirely while still achieving accurate threshold voltage distribution.
3Manufacturing precision
If verification operations are performed, then programming accuracy is improved, but the risk of short paths between bit lines increases
Solution Approach 1:
The patent converts the potential harm of verification operations (which can create short paths between bit lines) into a benefit by eliminating the verification step entirely. By continuously programming all cells without verification, the method avoids the harmful short path effect while still achieving accurate threshold voltage distribution through the consistent application of program voltage until reference level is reached.
Data Source
AI summary
A program method includes applying a first voltage to a plurality of bit lines, applying a second voltage to a common source line (CSL), and performing a program loop by applying a program voltage and a verify voltage to each of a plurality of ground selection lines (GSLs) positioned between one bit line among the plurality of bit lines and the CSL. The program loop is performed on both a program completed cell in which a program is completed by applying the program voltage and a program target cell.


