Ground Selection Transistor Layout for Isolating Unselected Cell Strings
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Solution Overview
Problem
The complexity of manufacturing flash memory devices makes it difficult to individually control various lines such as string selection and ground selection lines, leading to reduced reliability and performance, as well as increased power consumption.
Innovation Solution
The memory device incorporates a structure where ground selection transistors are connected to ground selection lines in units of rows, allowing individual control of each cell string, with threshold voltages set to ensure only the selected cell string is electrically connected to the common source line, while unselected strings are isolated.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If various lines are controlled individually in units of cell string, then reliability and performance are improved, but manufacturing complexity increases
Solution Approach 1:
The ground selection lines are divided into multiple segments (first ground selection line GSL1, second ground selection line GSL2, etc.), with each segment controlling specific ground selection transistors in different cell strings. This segmentation enables individual control of ground selection transistors per cell string, improving reliability and performance while the segmented structure is designed to be compatible with existing manufacturing processes
2Productivity
If various lines are controlled individually in units of cell string, then performance is improved, but manufacturing complexity increases
Solution Approach 1:
Ground selection transistors are segmented and assigned to different ground selection lines based on their position in cell strings. This allows independent control of ground selection transistors in different cell strings, enabling improved performance through selective activation while maintaining compatibility with standard manufacturing processes
Solution Approach 2:
Different ground selection transistors are assigned to different ground selection lines based on their local position and function within the memory array. This local differentiation enables precise control of individual cell strings, improving performance by allowing selective operation of specific memory regions
3Reliability
If ground selection transistors are controlled individually, then reliability is improved, but power consumption increases
Solution Approach 1:
The ground selection lines are segmented into multiple independent lines, allowing only the ground selection transistors corresponding to the selected cell string to be activated. This selective activation improves reliability by ensuring proper ground connection for the selected string while reducing power consumption by keeping ground selection transistors in unselected strings in the off state
Solution Approach 2:
The ground selection transistors dynamically switch between on and off states based on whether their corresponding cell string is selected. This dynamic control ensures that ground selection transistors are activated only when needed, improving reliability through proper grounding of selected strings while minimizing power consumption by maintaining unselected strings in a high-impedance state
Data Source
AI summary
An example memory device includes a substrate, and a first cell string and a second cell string on the substrate between a first bit line and a common source line. The first cell string includes a first string selection transistor connected to a first string selection line and first and third ground selection transistors connected to first and second ground selection lines, respectively. The second cell string includes a second string selection transistor connected to a second string selection line and second and fourth ground selection transistors connected to the first and second ground selection lines, respectively. When the first cell string is a selected cell string, in the second cell string, the second and fourth ground selection transistors are turned off, and at least one ground selection transistor between the second and fourth ground selection transistors is turned on.