Grounded Buffer Multiplexer for High-Bit-Rate Jitter Immunity
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Solution Overview
Problem
Multiplexers operating at high bit rates experience performance degradation due to interference from unselected input signals, leading to jitter at the output, which is not effectively addressed by existing technologies.
Innovation Solution
The implementation of a multiplexer design featuring dual buffer circuits that either provide differential output signals when selected or tie outputs to ground when not selected, thereby immunizing the system from unselected input signal interference and allowing operation at lower supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional multiplexer is used to select between multiple input signals, then the multiplexer can provide signal switching functionality, but unselected input signals cause interference and jitter at the output, especially at high bit rates
Solution Approach 1:
The patent extracts and removes the harmful interference from unselected input signals by implementing isolation circuits that physically separate the unselected inputs from the output path. The isolation circuits prevent the unselected signals from coupling into the output, effectively taking out the harmful factor while preserving the desired signal switching function.
Solution Approach 2:
The patent introduces intermediary isolation circuits between the multiplexer inputs and output. These intermediary circuits act as mediators that allow the selected signal to pass through while blocking or preventing the unselected signals from reaching the output, thus resolving the interference problem without sacrificing the multiplexer's core functionality.
2Reliability
If the multiplexer is designed to reduce interference from unselected inputs, then signal integrity improves, but the device complexity increases due to additional isolation circuits
Solution Approach 1:
The patent segments the multiplexer circuit into distinct functional blocks: the core multiplexer switching unit and separate isolation circuits for each input. This segmentation allows the isolation functionality to be added modularly, making the complexity manageable and enabling independent optimization of each segment without redesigning the entire system.
Solution Approach 2:
The patent applies isolation circuits selectively at specific locations where interference is most problematic, rather than uniformly across all circuits. By placing isolation circuits only at critical input paths or output stages where unselected signals cause the most harm, the design achieves improved signal integrity with minimal additional complexity.
Data Source
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AI summary
A multiplexer comprises: an output circuit comprising a multiplexer output; and a first buffer coupled to the output circuit and comprising: a first selection input configured to receive a first selection signal; a first logical input configured to receive a first logical input signal; and a first ground; wherein the multiplexer is configured to: couple the first logical input to the multiplexer output when the first selection signal is a first value; and couple the first logical input to the first ground when the first selection signal is a second value. A method comprises: receiving a selection signal and a first logical input signal; coupling a first logical input to a multiplexer output when the selection signal is a first value; and coupling the first logical input to a ground when the selection signal is a second value.