Grounded Electrode Supports for High-Capacitance DRAM Capacitors
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Solution Overview
Problem
As semiconductor devices become more integrated, achieving higher capacitance while maintaining a smaller footprint is challenging, particularly in dynamic random access memory (DRAM) devices, where capacitance is limited by the surface area of the capacitor's electrode.
Innovation Solution
The semiconductor device incorporates a conductive electrode support connected to a ground voltage, featuring a dielectric layer on the lower electrodes and electrode supports, and an upper electrode, which increases capacitance while preventing electrode tilting or collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the height of the lower electrode is increased to increase contact area with the dielectric layer, then capacitance is improved, but the lower electrode may tilt or collapse
Solution Approach 1:
An electrode support structure is introduced as an intermediary element between adjacent lower electrodes. This support provides mechanical stabilization to prevent tilting or collapse of the elevated lower electrodes, while being positioned to not interfere with the capacitor formation. The support acts as a mediator that enables the lower electrode height increase without compromising structural integrity.
2Stability of the object's composition
If a support structure is added to prevent lower electrode tilting, then structural stability is improved, but device complexity increases
Solution Approach 1:
The electrode support structure serves multiple functions: it provides mechanical stabilization to prevent lower electrode tilting, maintains proper spacing between adjacent electrodes, and can be integrated into the existing capacitor fabrication process. By designing the support to fulfill multiple roles simultaneously, the added complexity is minimized while achieving comprehensive structural stability.
3Area of stationary object
If design rules are reduced to achieve smaller footprint, then integration density is improved, but capacitance is reduced due to smaller electrode surface area
Solution Approach 1:
The invention transitions from a two-dimensional capacitor design to a three-dimensional structure by elevating the lower electrode vertically. This allows the capacitor to achieve required capacitance values by increasing the contact area between the lower electrode and dielectric layer in the vertical dimension, while maintaining a compact footprint in the horizontal plane. The lower electrode is raised to a height where it contacts the dielectric layer, creating additional capacitive coupling area without expanding the device footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the performance and reliability of semiconductor devices by increasing capacitance without compromising the device's footprint, while also preventing leakage currents between adjacent electrodes.
Implementation Method 1
a dielectric layer on the plurality of lower electrodes and the first electrode support
Implementation Method 2
insulating spacers on sidewalls of each of the lower electrode holes
Data Source
AI summary
A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.