Monolithic Group III Nitride Integration via Selective Epitaxial Regrowth

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Solution Overview

Problem

Existing methods for monolithic integration of Group III nitride devices on a single epitaxial structure result in less than optimal performance due to the need for precise recess etching and the introduction of performance limitations from buried layers, and fail to optimize epitaxial structures for different device functions.

Innovation Solution

A method involving the growth of distinct sets of Group III nitride epitaxial layers on a substrate for different heterostructure field effect transistors, allowing for selective etching and regrowth to optimize each device's epitaxial structure independently, enabling the monolithic integration of various devices on a single substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single epitaxial structure is used for monolithic integration, then device integration is achieved, but performance is less than optimal due to uniform structure constraints

Engineering Contradiction:
Improvedevice performanceVSAvoidepitaxial structure optimization for different device functions
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent divides the epitaxial structure into multiple separate sets of layers, each grown independently on the substrate. This segmentation allows each set to be optimized for specific device requirements (e.g., different AlGaN compositions, thicknesses, and doping profiles) while maintaining monolithic integration on a single substrate, thereby resolving the contradiction between integration and performance optimization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by growing different epitaxial layer configurations in different regions of the substrate. Each region can have tailored layer structures, compositions, and properties matched to the specific device type being fabricated there, enabling optimal performance for each device function while achieving monolithic integration across the wafer.

Inventive Principle:
Principle #3Local quality

2Productivity

If selective recess etching is used to expose buried layers, then second devices can be fabricated, but manufacturing precision requirements become extremely high

Engineering Contradiction:
Improvedevice integration capabilityVSAvoidrecess etching precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary action by completely removing the first set of epitaxial layers in designated regions before growing the second set, rather than relying on precise recess etching to expose buried layers. This approach eliminates the need for extremely precise etching control while still enabling the formation of second devices on the same substrate, thereby improving productivity without compromising manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance and complexity of integrated circuits by allowing each device to be fabricated with epitaxial layers optimized for its specific function, improving yield and reducing performance limitations, and enabling the integration of enhancement and depletion mode devices on a single wafer for high-density, low-power logic circuits.

Implementation Method 1

a first set of Group III nitride epitaxial layers grown on a first region of the substrate for a first heterostructure field effect transistor, and a second set of Group III nitride epitaxial layers grown on a second region of the substrate for a second heterostructure field effect transistor

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS10418473B1Monolithic integration of group III nitride epitaxial layers
Publication Date: 2019.09.17 HRL LAB
  • US10418473B1 patent drawing
  • US10418473B1 patent drawing
  • US10418473B1 patent drawing

AI summary

A monolithically integrated device includes a substrate, a first set of Group III nitride epitaxial layers grown for a first HFET on a first region of the substrate, and a second set of Group III nitride epitaxial layers for a second HFET grown on a second region of the substrate.