Group III-V Device Structure With Through Via Grounding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Group III-V semiconductor device structures are not entirely satisfactory due to their normally ON state, which is undesirable in power applications where current flow should be inhibited, and they face challenges in preventing cracking during substrate cutting due to lattice mismatch and thermal expansion coefficient differences.
Innovation Solution
A Group III-V device structure is formed with a heterojunction channel and a through via structure that connects the substrate to ground, using epitaxial growth processes for layer formation, and includes a buffer layer to increase breakdown voltage and a gate electrode to deplete the two-dimensional electron gas, converting the device to a normally OFF state. The through via structure is formed in the front-end-of-line process to prevent cracking and background noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Group III-V device structure is used to achieve high electron mobility and high frequency signal transmission, then the device performance is improved, but the device remains in a normally ON state which is undesirable for power applications where current flow should be inhibited
Solution Approach 1:
A through via structure is formed through the substrate before other device layers are deposited, establishing a predetermined conductive path to ground. This preliminary structural arrangement enables the device to be configured in a normally OFF state by design, allowing current control to be inhibited when not actively switched on, thus resolving the contradiction between maintaining high performance and achieving proper current control for power applications
2Reliability
If Group III-V compound layers are deposited over the substrate to form the device structure, then high electron mobility is achieved, but cracking occurs during substrate cutting due to lattice mismatch and thermal expansion coefficient differences
Solution Approach 1:
The substrate is segmented by forming through via structures that create controlled discontinuities. These via structures act as stress relief features that divide the continuous substrate into separate regions, preventing crack propagation across the entire substrate during cutting operations while preserving the high electron mobility properties of the Group III-V compound layers in the active device regions
Solution Approach 2:
The through via structures serve as intermediary elements between the substrate and the overlying device layers. These via structures, filled with conductive material, act as stress buffers that accommodate the lattice mismatch and thermal expansion coefficient differences between the substrate and Group III-V compound layers, preventing cracking while maintaining structural integrity and electrical functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively converts the device to a normally OFF state, improving current performance and preventing cracking during substrate cutting, while reducing background noise by grounding the substrate through the through via structure.
Implementation Method 1
A group III-V device structure includes a channel layer formed over a substrate, an active layer formed over the channel layer
Implementation Method 2
a gate electrode to deplete the two-dimensional electron gas, converting the device to a normally OFF state
Implementation Method 3
a through via structure formed through the channel layer, the active layer and a portion of the substrate, and the through via structure is electrically connected to the source electrode or the drain electrode
Data Source
AI summary
A group III-V device structure is provided. The group III-V device structure includes a channel layer formed over a substrate and an active layer formed over the channel layer. The group III-V device structure also includes a gate structure formed over the active layer and a source electrode and a drain electrode formed over the active layer. The source electrode and the drain electrode are formed on opposite sides of the gate structure. The group III-V device structure further includes a through via structure formed through the channel layer, the active layer and a portion of the substrate, and the through via structure is electrically connected to the source electrode or the drain electrode.


