Group Read Refresh for Memory Data Integrity
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Solution Overview
Problem
Data read from memory devices can have errors if memory blocks or groups are disturbed or in an unexpected state, leading to issues with data integrity.
Innovation Solution
The implementation of a group read refresh system that includes an operation circuit for selected memory groups and a remediation circuit for unselected memory groups, using different voltage levels to perform operations and countermeasure operations to maintain data integrity across all memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If operations are performed on selected memory groups using operation voltage levels, then the selected memory groups can be accessed and operated efficiently, but unselected memory groups may be disturbed or transitioned to unexpected states leading to data errors
Solution Approach 1:
The patent applies preliminary anti-action by performing read refresh operations on unselected memory groups before they can be disturbed by subsequent operations. The controller proactively refreshes unselected memory groups that share control lines with the selected memory group, preventing potential data errors before they occur. This countermeasure ensures that unselected memory groups remain in a stable read state even though they are not the current target of operations.
Solution Approach 2:
The patent implements preliminary action by transitioning unselected memory groups to a read state as part of the operation setup phase. Before actual read or write operations commence on selected memory groups, the controller prepares unselected memory groups by applying appropriate voltage levels to place them in a stable read state, preventing future disturbances and ensuring data integrity throughout the operation cycle.
2Manufacturing precision
If different voltage levels are used for selected and unselected memory groups during operations, then operational precision can be maintained, but system complexity increases due to the need for multiple voltage level management
Solution Approach 1:
The patent applies universality by using a single control line to serve multiple functions: it controls both selected memory groups during operations and unselected memory groups during read refresh operations. The same control line infrastructure is reused to apply different voltage levels at different times to different memory groups, eliminating the need for separate control lines for each function and reducing overall system complexity.
Solution Approach 2:
The patent implements dynamics by dynamically switching the function of control lines based on operational phase. The controller dynamically assigns control lines to control either selected or unselected memory groups depending on whether the system is in operation mode or read refresh mode. This dynamic allocation allows the same hardware infrastructure to adapt to different operational requirements without increasing physical complexity.
3Reliability
If read refresh operations are performed on unselected memory groups in response to operations on selected memory groups, then bit error rates are reduced and data integrity is maintained, but operation time increases
Solution Approach 1:
The patent applies continuity of useful action by performing read refresh operations on unselected memory groups during the operational cycle rather than as separate sequential steps. The controller continuously manages voltage levels on control lines to maintain unselected memory groups in a stable read state throughout the operation, ensuring that refresh actions are ongoing and integrated into the normal operational flow, thereby minimizing additional time overhead.
Solution Approach 2:
The patent merges the read refresh operation with the normal read/write operation cycle. Instead of treating read refresh as a separate, time-consuming step, the controller combines it with the existing operation workflow by managing voltage levels on control lines in an integrated manner. This merging allows both operations to occur in a coordinated fashion, reducing the total time penalty compared to sequential execution.
Data Source
AI summary
Apparatuses, systems, methods, and computer program products are disclosed for performing a group read refresh. An apparatus includes a plurality of memory groups. An apparatus includes an operation circuit that performs an operation on a selected memory group of a plurality of memory groups. An apparatus includes a remediation circuit that performs a countermeasure operation on an unselected memory group of a plurality of memory groups in response to an operation on a selected memory group.