Grouped Crossbar Switch Blocks Reduce Interconnect Area
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Solution Overview
Problem
Existing crossbar switch architectures with wide data paths face sub-optimization in area, performance, and power due to the large interconnect spacings required for data lines, leading to high power dissipation and reduced frequency of operation, especially in semiconductor technologies with feature sizes of 45 nanometers or less.
Innovation Solution
The crossbar switch architecture is optimized by dividing the data lines into groups, reducing the length of data lines and the number of cross points, resulting in a more compact design with reduced area and power consumption, achieved by arranging input and output ports into blocks, each containing a subset of data lines, which minimizes the area required for the cross-point array and reduces power dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all data lines comprising an input port or output port are co-located together, then routing is simplified, but the area required for interconnect spacings increases significantly
Solution Approach 1:
The patent divides the crossbar switch into multiple segments or blocks, where each block handles a subset of data lines. Instead of co-locating all data lines for a port together, the data lines are distributed across different blocks, reducing the interconnect spacing requirements within each block while maintaining routing simplicity through the segmented architecture.
2Productivity
If the data path width is increased to handle more data lines, then the switching capacity is improved, but the area required for routing increases as the square of the number of data lines
Solution Approach 1:
The crossbar switch is segmented into multiple blocks, each handling a portion of the total data lines. This segmentation allows the switching capacity to be maintained across the entire system while reducing the area required for routing within each individual block, since the area scales with the square of the number of data lines per block rather than the total number of data lines.
Solution Approach 2:
The patent organizes data lines and cross-points into a two-dimensional block structure, where data lines are arranged in rows and columns within each block. This dimensional organization allows efficient routing within blocks while the overall switching capacity is achieved through the combination of multiple blocks, effectively distributing the area requirement across different spatial dimensions.
3Area of stationary object
If the length of data path signal lines is reduced, then the area for cross-point transistors can be minimized, but the routing complexity increases
Solution Approach 1:
By segmenting the crossbar switch into blocks with localized data line groups, the patent reduces the length of data path signal lines within each block. The routing complexity is managed through the systematic organization of blocks, where each block handles a specific subset of connections, thereby minimizing transistor area while maintaining controllable routing complexity.
4Area of stationary object
If the number of cross points is reduced to minimize area, then the power dissipation is reduced, but the switching capability is limited
Solution Approach 1:
The patent achieves comprehensive switching capability through multiple segmented blocks, where each block contains a manageable number of cross points. The total switching capability is the aggregate of all blocks, allowing the system to handle all possible input-output port connections while each individual block uses fewer cross points, thereby reducing the total area and power dissipation compared to a single large cross-point array.
Data Source
AI summary
A crossbar switch is optimized for area, performance, and power by grouping the data lines that comprise the input ports and output ports of the switch into a plurality of separate cross-point blocks. Each cross-point block contains a complete set of input and output ports but the number of data lines comprising the input and output ports of each separate cross-point block is reduced to fraction of the number of data lines contained in each port of the crossbar switch. This fraction is equal to one divided by the number of separate cross-point blocks. Area, performance, and power of the crossbar switch are improved provided the area of the crossbar switch without grouping of data lines into separate cross-point blocks is determined by the pitch of the data lines rather than the area of the cross-point circuits. The number of blocks can be selected to optimize area, performance and power.