Grouped Current Control Units for Timing Circuit Area Reduction
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Solution Overview
Problem
Existing timing control circuits for data processing systems require significant circuit area due to the need for decoders to convert control values into signals for individual control cells, leading to high area overhead, especially in memory applications where variable timing is necessary to account for manufacturing variations and application requirements.
Innovation Solution
A timing control circuit utilizing multiple current control units grouped in parallel, where each group has a different number of units, and a control value determines which groups are active or inactive, eliminating the need for decoders by directly controlling the current magnitude through bit values, thereby reducing area overhead and enabling tunable signal timing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a decoder is provided to convert control value into signals for switching each individual control cell, then individual control of control cells is achieved, but circuit area overhead increases significantly
Solution Approach 1:
The patent segments the control mechanism by dividing control cells into groups, where each group is controlled by a single control signal. This segmentation eliminates the need for a full decoder while still enabling individual group control. For example, instead of using a 4:16 decoder to control 16 individual cells, the patent groups cells into smaller units that can be controlled with fewer signals, significantly reducing the decoder area overhead.
Solution Approach 2:
The patent merges multiple control cells into groups that share common control signals. By combining cells into groups where a single control signal switches all cells in that group simultaneously, the design reduces the total number of control signals needed. This merging approach trades off fine-grained individual cell control for significant area savings in the decoder circuitry.
2Speed
If more control cells are switched into the dummy loop path, then current flow increases and timing is accelerated, but circuit complexity and area increase
Solution Approach 1:
The patent implements dynamic timing control by enabling selective activation of control cell groups based on timing requirements. The control circuit can dynamically adjust which groups are active to achieve the desired timing acceleration without permanently complexing the circuit. This dynamic approach allows the same circuit structure to provide variable timing without increasing inherent circuit complexity.
Solution Approach 2:
The patent changes the operational parameter of the dummy loop by varying the number of active control cell groups. By controlling which groups are switched into the path, the system can adjust the current flow and timing characteristics without changing the physical circuit structure. This parameter-based control achieves timing variation without adding circuit complexity.
Data Source
AI summary
A timing control circuit comprises at least three current control units coupled in parallel between a first circuit and a second circuit node. The current control units each have an active mode and an inactive mode. The current control units are responsive to a timing trigger event to pass current whose magnitude is dependent on how many of the current control units are in the active mode. The current control units comprise a plurality of groups. Current control units within a same group are responsive to a change in a bit of a control value corresponding to that group to switch together between the active and inactive modes, such that the magnitude of the current is dependent on which of the groups are in the active mode. The signal timing in the associated circuit is varied in dependence on the magnitude of the current.