Grouped Ising Optimization Circuit for One-Hot State Transitions
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Solution Overview
Problem
Conventional optimization devices face challenges in efficiently solving optimization problems with one-hot constraints, leading to increased calculation time due to energy barriers and a large search space, as they often search for states that do not satisfy the constraint.
Innovation Solution
The optimization device employs a novel architecture that calculates energy changes for multiple bits within groups, allowing simultaneous updates of two bits to satisfy the one-hot constraint, reducing the search space and energy barriers by using local field values and thermal excitation energy to identify and update bits efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the conventional optimization device searches for ground state by repeating state transition with Hamming distance = 1, then the device can find the ground state, but the calculation time becomes excessively long due to energy barriers and large search space
Solution Approach 1:
The patent segments the bit string into multiple groups and processes each group independently. By dividing the search space into manageable segments (groups), the device can efficiently explore states while maintaining one-hot constraints, reducing the overall calculation time without sacrificing ground state accuracy.
Solution Approach 2:
The patent performs preliminary action by pre-calculating local field values for all bits before state transition. This allows the selection circuit to quickly identify candidate bits for transition based on energy change criteria, avoiding the need to evaluate all possible single-bit transitions and thus reducing calculation time.
2Adaptability or versatility
If the conventional optimization device allows transition to states not satisfying one-hot constraint, then the search space increases, but the calculation time increases due to energy barriers from one-hot constraint terms
Solution Approach 1:
The patent extracts and enforces one-hot constraints at the group level by design. The selection circuit is configured to only select bits that maintain one-hot constraints within their groups, effectively removing invalid states from the search space. This reduces the number of energy barrier crossings needed while still achieving comprehensive search coverage.
Solution Approach 2:
The patent introduces the selection circuit as an intermediary between the energy change calculation and state transition. This intermediary ensures that only transitions satisfying one-hot constraints are permitted, acting as a gatekeeper that filters out invalid states and reduces calculation time by avoiding energy barrier crossings.
3Ease of operation
If the optimization device processes only one bit change at a time, then the state transition is simple to control, but the number of transitions required increases significantly
Solution Approach 1:
The patent merges multiple bit transition evaluations into a single processing cycle by calculating local field values for all bits simultaneously and using the selection circuit to identify candidate transitions. This combining approach maintains the simplicity of controlled transitions while dramatically improving search efficiency by processing multiple candidates in parallel.
Data Source
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AI summary
An optimization device comprising: a plurality of calculation circuits, each of which calculates, for a plurality of bits corresponding to a plurality of spins included in an Ising model obtained by converting a problem to be calculated, in a case where the plurality of bits is divided into a plurality of groups, on the basis of a first local field value for a first bit having a value of 1 and a second local field value for a second bit having a value of 0 among a plurality of bits included in each of the plurality of groups, a first energy change of the Ising model due to a change of the value of the first bit from 1 to 0 and a change of the value of the second bit from 0 to 1; a selection circuit that outputs first bit identification information for identifying one of a plurality of the second bits that allows update of the value from 0 to 1 among the second bits included in each of the plurality of groups, on the basis of a magnitude relationship between the first energy change output by each of the plurality of calculation circuits and thermal excitation energy determined on the basis of an input temperature parameter and a random number; an identification information calculation unit that detects a first group to which the second bit allowed to be updated belongs on the basis of the first bit identification information output by the selection circuit, and outputs second bit identification information for identifying the first bit that belongs to the first group; an update unit that updates the value from 1 to 0 of the first bit that belongs to the first group on the basis of the second bit identification information output by the identification information calculation unit, and updates the value from 0 to 1 of the second bit allowed to be updated on the basis of the first bit identification information; a second storage unit that holds all rows corresponding to bit identification information for identifying a bit having a value of 1 in a matrix of weight values that indicate a magnitude of interaction between each of the plurality of bits held by a first storage unit, in each of the plurality of groups; and a local field generation unit that generates the first local field value and the second local field value, respectively on the basis of a first row corresponding to the first bit identification information read from the first storage unit on the basis of the first bit identification information output by the selection circuit and a second row corresponding to the second bit identification information read from the second storage unit.