Grouping Formal Verification Failures by Root Cause
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Solution Overview
Problem
Formal verification tools in electronic design often produce a large number of violations during prelayout design rule checking, known as linting, which can overwhelm designers with noise and require them to sift through numerous irrelevant checks, making it difficult to identify and address the root causes of failures.
Innovation Solution
A method that uses structural and formal verification methods to identify and group failures with similar root causes, allowing for grouping based on check types, and displays these groupings in a graphical user interface, thereby reducing the noise and focusing on representative failures for debugging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If formal verification tools perform comprehensive linting analysis using structural and formal methods, then verification coverage and reliability are improved, but the number of reported violations increases creating noise that overwhelms designers
Solution Approach 1:
The patent combines multiple linting checks that share common root causes into grouped violations. By merging related violations together based on their underlying causes rather than treating them as separate issues, the system reduces noise while preserving comprehensive verification coverage. This allows designers to address root causes that may trigger multiple violations simultaneously.
Solution Approach 2:
The patent introduces an intermediary classification layer that analyzes the root causes of violations and groups them accordingly. This intermediary processing step sits between the formal verification engine and the designer interface, transforming raw violation data into organized groups based on underlying causes, thereby reducing noise without sacrificing verification thoroughness.
2Reliability
If designers review all reported violations individually, then complete verification is achieved, but time and effort required for analysis and debugging increases significantly
Solution Approach 1:
By grouping violations with common root causes together, the patent allows designers to address multiple violations through a single fix. This merging approach maintains verification completeness by ensuring all violations are accounted for within groups, while dramatically reducing the time required for analysis and debugging by eliminating redundant review of similar issues.
Solution Approach 2:
The patent segments violations into distinct groups based on their root causes, allowing designers to systematically address each group rather than reviewing violations in isolation. This segmentation organizes the verification feedback into manageable units that can be addressed efficiently while maintaining complete verification coverage.
3Measurement precision
If linting tools report all violations without filtering, then measurement precision is improved, but ease of operation deteriorates as designers must sift through irrelevant checks
Solution Approach 1:
The patent merges violations that share root causes into grouped results, preserving the precision of individual violation detection while improving ease of operation. By combining related violations rather than presenting them as separate unrelated issues, the system maintains measurement precision while making the results more actionable and easier to analyze for designers.
Solution Approach 2:
The patent changes the organizational parameter of violation reporting from individual violation listings to grouped violations based on root causes. This parameter change transforms the presentation from a flat list of issues to a hierarchical structure organized by underlying causes, thereby improving ease of operation while maintaining the precision of violation detection through the grouping logic.
Data Source
AI summary
The present disclosure relates to a method for use in a formal verification of an electronic design. Embodiments may include providing, using at least one processor, an electronic design and performing linting analysis using structural and formal methods of at least a portion of the electronic design. Embodiments may also include identifying a plurality of failures from the formal verification and identifying one or more of the plurality of failures as having a similar root cause. Embodiments may include grouping the one or more of the plurality of failures together, wherein grouping is based upon, at least in part, a check type.