GTECH File Comparison for Faster Chip ECO Point Detection

The patent segments the ECO extraction process into three distinct stages: (1) hierarchical structure comparison to identify potential ECO points, (2) functional equivalence verification to filter non-critical differences, and (3) manual review of only confirmed ECO points. This segmentation reduces the overwhelming task of reviewing all netlist differences into manageable phases, significantly reducing time loss while maintaining detection accuracy.

The patent applies local quality by focusing detailed analysis only on specific critical regions identified through hierarchical comparison, rather than uniformly analyzing the entire netlist. By identifying and prioritizing key modules and circuits that are more likely to contain ECO points, the method concentrates computational resources on high-value areas, reducing overall processing time while maintaining comprehensive detection capability.

The patent creates a simplified copy of the LEC functionality by implementing core equivalence checking algorithms within the ECO extraction tool itself. Rather than relying on external commercial LEC tools, the system incorporates essential verification capabilities directly, eliminating the need for expensive commercial software licenses while maintaining adequate equivalence checking accuracy for ECO point identification.

The patent replaces expensive, long-term commercial LEC tool dependencies with a self-contained, cost-effective solution that can be deployed without ongoing licensing fees. The implemented equivalence checking functionality provides sufficient accuracy for ECO extraction purposes without requiring continuous investment in commercial tool subscriptions, significantly reducing operational costs.

The patent segments the design representation into multiple hierarchical levels, utilizing both RTL-level views for understanding design intent and netlist-level views for detecting implementation details. By orchestrating comparisons at different hierarchical levels sequentially, the method captures both high-level design intentions and low-level implementation changes without requiring a single complex verification process.

The patent merges RTL comparison and netlist comparison results in a unified analysis framework. By combining the strengths of both approaches—RTL's ability to reveal design intent and netlist's ability to expose implementation details—the system achieves comprehensive ECO point identification without requiring separate, complex verification processes for each level.

The patent segments the filtering task by automatically categorizing difference points into distinct priority levels based on their characteristics and potential ECO significance. High-priority differences requiring manual review are clearly distinguished from low-priority differences that can be automatically accepted or rejected. This segmentation enables engineers to focus manual filtering efforts only on critical cases, significantly improving productivity while maintaining high accuracy.

The patent applies different filtering strategies to different types of difference points based on their local characteristics. Critical ECO points receive detailed manual review, while non-critical differences are handled through automated rules. This localized quality approach ensures high accuracy for important ECO points while maintaining overall processing efficiency through selective manual intervention.