GTP Code Encoding Using Syndrome Vectors and Smaller Matrix Stages
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Solution Overview
Problem
Existing error correcting codes, such as BCH codes, are either inefficient in decoding or not simply decodable, while Generalized Tensor Product (GTP) codes offer simpler decoders but require complex hardware for large matrices, posing challenges in efficient encoding and decoding processes.
Innovation Solution
The method involves using smaller matrix multiplications and polynomial representations to generate binary GTP codewords, separating single binary matrix multiplication into several smaller multiplications, and employing BCH code properties to reduce hardware complexity and enhance decoding efficiency by utilizing syndrome vectors and submatrices for partial parallel multiplications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large matrix multiplications are used for GTP code encoding, then error correction capability is improved, but hardware complexity and power consumption increase
Solution Approach 1:
The patent divides a large matrix multiplication operation into multiple smaller matrix multiplications. Specifically, the encoding process is segmented into N structure stages, where each stage processes a portion of the codeword using smaller matrices. This segmentation reduces the hardware complexity of individual operations while maintaining the overall error correction capability through the cumulative effect of multiple stages.
Solution Approach 2:
The patent transforms the single large matrix multiplication problem into a multi-dimensional solution by introducing N structure stages. Each stage operates in a separate temporal and structural dimension, processing different portions of the codeword. This dimensional transformation allows the system to achieve the same error correction capability as a single large matrix operation would provide, but with reduced hardware complexity at each stage.
2Speed
If single clock full parallel multiplication is used, then encoding speed is improved, but hardware complexity and power consumption increase
Solution Approach 1:
The patent segments the parallel multiplication process into N structure stages, where each stage performs smaller parallel multiplications. This segmentation allows the system to maintain high encoding speed through parallel processing at each stage while reducing the hardware complexity associated with any single parallel multiplication operation.
Solution Approach 2:
The patent employs dynamic parallel processing across N structure stages, where each stage can be activated and processed in sequence or parallel depending on the specific encoding requirements. This dynamic approach allows the system to optimize between speed and hardware complexity by adjusting the degree of parallelism utilized at different stages.
3Ease of operation
If simpler decoders are used for GTP codes, then decoding simplicity is improved, but error correction capability may be reduced
Solution Approach 1:
The patent segments the decoding process into N structure stages corresponding to the encoding stages. Each stage uses a simpler decoder appropriate for its specific portion of the codeword, while the cumulative effect of all stages maintains the overall error correction capability. This segmented approach allows simpler decoders at each stage to collectively achieve the reliability of more complex unified decoders.
Data Source
AI summary
A method for generating a binary GTP codeword, comprised of N structure stages and each stage comprises at least one BCH codeword with error correction capability greater than a prior stage and smaller than a next stage, includes: receiving a syndrome vector s of a new stage 0 binary BCH codeword y over a field GF(2m) that comprises Δt syndromes of length m bits, wherein the syndrome vector s comprises l-th Reed-Solomon (RS) symbols of Δt RS codewords whose information symbols are delta syndromes of all BCH codewords from stage 0 until stage n−1; and multiplying s by a right submatrix Ũ of a matrix U, wherein U is an inverse of a parity matrix of an BCH code defined by tn, wherein the new binary BCH codeword is y=Ũ·s.


