Guard Page Memory Isolation for Bit Flip Mitigation

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Solution Overview

Problem

In multi-tenant resource environments, existing methods to mitigate memory vulnerabilities such as bit flips are either ineffective or costly, particularly for attacks like row hammer and ECCploit, which can cause errors and data corruption across different user regions on shared servers.

Innovation Solution

The approach involves mapping physical memory pages to virtual memory pages, using guard pages to isolate data and detect errors, and updating page mappings to prevent bit flips from affecting other memory locations, thereby protecting against attacks without requiring costly hardware upgrades.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If physical memory pages are shared across multiple users in a cloud environment, then resource utilization and productivity are improved, but memory vulnerability to bit flip attacks increases

Engineering Contradiction:
Improveresource utilizationVSAvoidmemory vulnerability
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments physical memory pages into isolated regions, each associated with a specific user or process. By dividing the shared memory space into discrete, protected segments, the system maintains high resource utilization while preventing bit flip attacks from propagating across user boundaries. Each segment is independently protected, allowing the system to share memory resources efficiently without compromising security.

Inventive Principle:
Principle #1Segmentation

2Reliability

If guard pages are used to isolate and detect memory errors, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces guard pages as intermediary structures between user memory regions and physical memory. These guard pages act as mediators that detect bit flip attacks and prevent them from affecting adjacent memory regions. The guard pages incorporate error detection mechanisms that monitor memory access patterns and trigger protective actions when anomalies are detected, thereby improving reliability while adding only minimal complexity through the intermediary layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If page mappings are updated dynamically to protect against attacks, then security is improved, but processing time increases

Engineering Contradiction:
Improvesecurity against bit flip attacksVSAvoidprocessing latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary protective measures by pre-configuring guard pages and establishing isolation mechanisms before bit flip attacks occur. The system proactively sets up error detection capabilities and memory protection structures in advance, so that when an attack is detected, the response can be executed quickly without extensive processing delays. This preliminary action reduces the time penalty associated with dynamic page mapping updates.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If existing mitigation approaches are implemented, then some memory vulnerabilities are reduced, but they can be defeated or come with excessive cost

Engineering Contradiction:
Improvevulnerability mitigationVSAvoidmitigation implementation cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a copying mechanism where guard pages create isolated copies of memory regions that can be monitored without affecting the original user data. When a bit flip attack is detected, the system can copy protected data from the guard page back to the user memory region, thereby mitigating the attack without requiring complex hardware modifications or expensive mitigation infrastructure. This copying approach provides effective vulnerability reduction at minimal cost.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12086072B1Memory vulnerability mitigation
Publication Date: 2024.09.10 AMAZON TECH INC
  • US12086072B1 patent drawing
  • US12086072B1 patent drawing
  • US12086072B1 patent drawing

AI summary

Vulnerabilities to physical memory, such as server dynamic random access memory (DRAM) with error correction code (ECC) capability, can be mitigated though the use of guard pages allocated in that physical memory. Physical memory pages can be mapped to virtual memory pages of a contiguous virtual address space. When an error such as a bit flip is detected in a physical memory page, the data from that physical memory page can be copied to a protected page, such as a guard page or page isolated from other sensitive data. Information such as an error correction code (ECC) can be used to determine and correct the erroneous bit. The mappings in a related page table can be updated such that the same virtual pages or addresses are then mapped to the guard page that now includes the relevant data.