Guard Ring Structure for Crack Resistance in Semiconductor Devices
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Solution Overview
Problem
During the dicing process of semiconductor devices, cracks can propagate through the interface between interconnects and insulating films, potentially breaking interconnects and deteriorating the reliability of the semiconductor device.
Innovation Solution
A guard ring structure is implemented with interlayer connection vias that connect interconnects in different layers without intervening connections, eliminating interfaces between the interconnects and insulating films, thereby reducing the likelihood of crack propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional guard ring structures with multiple interconnect layers and vias are used, then crack propagation can be reduced, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The guard ring structure is segmented into multiple functional layers: a first guard ring structure at a first depth level and a second guard ring structure at a second depth level. This segmentation allows each layer to independently contribute to crack resistance while maintaining simpler individual structures, resolving the contradiction between reliability and complexity.
Solution Approach 2:
The patent introduces a vertical depth dimension by forming guard ring structures at different depth levels within the substrate. The first guard ring structure is formed at a first depth level and the second guard ring structure is formed at a second depth level, creating a three-dimensional distributed guard ring system that enhances crack resistance without requiring excessive horizontal complexity.
2Reliability
If multiple interconnect layers with interfaces are provided, then electrical connectivity is improved, but crack propagation paths increase
Solution Approach 1:
The patent introduces an intermediary approach by using deep trench isolation structures filled with dielectric material between the interconnect layers. These isolation structures act as mediators that provide electrical connectivity through controlled interfaces while simultaneously blocking crack propagation paths, thus resolving the contradiction between connectivity and crack resistance.
Solution Approach 2:
The guard ring structures are selectively formed at specific locations around the circuit region rather than uniformly across the entire device. The first and second guard ring structures are positioned at different depth levels at strategic locations, providing localized crack resistance where most needed while maintaining electrical connectivity in functional areas.
Data Source
AI summary
A semiconductor device includes a substrate having a circuit region and a peripheral region disposed around and enclosing the circuit region in a plan view, a first interconnect layer formed on the substrate, a second interconnect layer formed on the first interconnect layer, a third interconnect layer formed on the second interconnect layer, and a guard ring formed in the peripheral region, wherein the guard ring includes a first interconnect formed in the first interconnect layer, and disposed around and enclosing the circuit region in a plan view, a second interconnect formed in the third interconnect layer, and disposed around and enclosing the circuit region in a plan view, and a first via connected to the first interconnect and to the second interconnect, and disposed in a groove shape along a perimeter edge of the substrate in a plan view.