Dual-Dopant Guard Ring Structure for Higher Holding Voltage
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Solution Overview
Problem
Existing guard ring designs for FinFET circuit devices struggle to balance the reduction of interference between adjacent devices and the increase of holding voltage during electro-static discharge (ESD) events, often requiring increased spacing that compromises chip area efficiency.
Innovation Solution
A dual-dopant type guard ring structure where an inner set of guard rings with one dopant type is in contact with an outer set of guard rings of opposite dopant type, reducing the need for spacing and enhancing energy dissipation during ESD events while maintaining device isolation and reducing interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the space between adjacent guard rings is increased, then the holding voltage of the circuit device is increased, but the chip area is increased
Solution Approach 1:
The patent changes the dopant type parameter of guard rings from uniform to alternating (n-type and p-type alternating). This parameter change enables the guard rings to effectively channel ESD current through opposite dopant type interactions, increasing holding voltage without requiring increased spacing between rings, thus resolving the contradiction between reliability and chip area.
Solution Approach 2:
The patent creates a composite guard ring structure by alternating different dopant types (n-type and p-type) in adjacent guard rings. This composite approach forms a more effective ESD protection system where the alternating dopant types work together to channel and dissipate energy, achieving higher holding voltage within the same chip area.
2Reliability
If the space between adjacent guard rings is increased, then the holding voltage of the circuit device is increased, but the interference reduction between adjacent devices is compromised
Solution Approach 1:
By changing the dopant type parameter to alternate between n-type and p-type in adjacent guard rings, the patent enhances the guard rings' ability to channel ESD current while maintaining tight spacing. This allows simultaneous achievement of high holding voltage and effective interference reduction between adjacent devices.
Solution Approach 2:
The patent converts the potentially harmful ESD current into a controlled flow by using alternating dopant types to create effective current channeling paths. The ESD energy is beneficially directed through the alternating n-type and p-type guard rings to safe dissipation paths, protecting adjacent devices while maintaining compact spacing.
3Ease of manufacture
If uniform dopant type guard rings are used, then the manufacturing process is simplified, but the energy dissipation capability during ESD events is reduced
Solution Approach 1:
The patent changes the dopant type parameter from uniform to alternating patterns. While this increases manufacturing complexity slightly, it dramatically improves energy dissipation capability during ESD events by creating more effective current channeling paths through the alternating n-type and p-type regions, allowing better control of high-energy discharge.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-dopant guard ring structure increases holding voltage, reduces the risk of damage during ESD events, and minimizes interference between neighboring devices without increasing chip area, thereby improving the overall performance and efficiency of the circuit device.
Implementation Method 1
Guard rings also help to dissipate energy in a circuit device during an electro-static discharge (ESD) event. An ESD event occurs when a large flow of electricity passes from one element to another.
Implementation Method 2
The dual-dopant guard ring structure where an inner set of guard rings with one dopant type is in contact with an outer set of guard rings of opposite dopant type, reducing the need for spacing and enhancing energy dissipation during ESD events
Data Source
AI summary
A circuit device includes core circuitry. The circuit device further includes a first plurality of guard rings having a first dopant type, wherein the first plurality of guard rings is around a periphery of the core circuitry. The circuit device further includes a second plurality of guard rings having a second dopant type, wherein the second dopant type is opposite to the first dopant type, and at least one guard ring of the second plurality of guard rings is around a periphery of at least one guard ring of the first plurality of guard rings.


