Guard Ring for Memory Array Gate Electrode Thickness

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Solution Overview

Problem

In integrated circuits, the remaining gate electrode thickness is non-uniform across the edge and center regions of the memory array due to the chemical mechanical polishing process, leading to an undesirable sloped profile and potential yield impact.

Innovation Solution

A guard ring surrounding the array region is formed with the same layers as the storage gates, which maintains the thickness of the gate electrode layer, ensuring uniformity across the center and edge regions during planarization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If chemical mechanical polishing process is used to planarize the gate electrode layer, then the top surface becomes planar, but the gate electrode thickness becomes non-uniform with sloped profile at edge regions

Engineering Contradiction:

Improveplanarity of top surfaceVSAvoiduniformity of gate electrode thickness

Core Design Contradiction:

ShapeVSManufacturing precision

Solution Approach 1:

A guard ring structure is formed surrounding the array region before the gate electrode layer is deposited. This guard ring acts as a protective feature that maintains adequate gate electrode thickness at edge regions during the subsequent CMP process, preventing the sloped profile that would otherwise occur.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The guard ring serves as an intermediary structure between the array region and the edge regions. It absorbs or compensates for the CMP erosion effects, protecting the actual memory cell regions from thickness non-uniformity while allowing the CMP process to proceed for planarization.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If gate electrode layer is planarized by CMP, then manufacturing process is simplified, but yield decreases due to non-uniform thickness affecting access gate formation

Engineering Contradiction:

Improvesimplicity of planarization processVSAvoidyield of memory device

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The guard ring is formed in advance before gate electrode deposition and CMP processing. This preliminary structure ensures that even after CMP planarization, the gate electrode maintains sufficient thickness at edge regions, preventing defects that would reduce yield while still allowing the CMP process to be used for simplification.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The guard ring provides a cushioning effect against CMP erosion at the edges. By having this protective structure in place beforehand, the patent compensates for the expected material removal during CMP, ensuring that the gate electrode thickness remains adequate for successful access gate formation and high yield.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Manufacturing precision

If guard ring is added to maintain gate electrode thickness uniformity, then manufacturing precision improves, but device complexity increases

Engineering Contradiction:

Improveuniformity of gate electrode thicknessVSAvoidstructure complexity with guard ring

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The guard ring is formed using the same storage gate layers as the memory cells themselves. By merging the guard ring formation with the existing storage gate fabrication process, the patent achieves thickness uniformity without adding separate process steps or materials, thereby minimizing the increase in device complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The guard ring utilizes the same layered structure as the storage gates, making it multi-functional in terms of manufacturing. This approach achieves the protective function of the guard ring while maintaining consistency with the existing device architecture, reducing the overall complexity increase.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The guard ring maintains uniform gate electrode thickness, improving manufacturability and yield by preventing erosion during CMP, ensuring adequate thickness for access gates and preventing substrate penetration by gate dopants, thus enhancing memory cell performance.

Implementation Method 1

a portion of the gate electrode layer at the edge of the memory array region is undesirably removed during a chemical mechanical polishing process (CMP) which is used to planarize the top surface of the gate electrode layer

Methodology Applied

Scientific EffectChemical mechanical polishing:

Data Source

PatentUS9269766B2Guard ring for memory array

Publication Date: 2016.02.23 GLOBALFOUNDRIES SINGAPORE PTE LTD

AI summary

A device and a method for forming a device are presented. The method includes providing a substrate having an array region in which memory cells are to be formed. Storage gates of the memory cells are formed in the array region. A guard ring surrounding the array region is formed. A gate electrode layer is formed on the substrate. The gate electrode layer fills gaps between the storage gates and guard ring. The gate electrode layer is planarized to produce a planar surface between the gate electrode layer, storage gates and guard ring. The guard ring maintains thickness of the gate electrode layer in the array region such that thickness of the storage gates across center and edge regions of the array region is uniform.