Guard Ring Noise Isolation in Semiconductor Devices
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Solution Overview
Problem
Conventional semiconductor devices face issues where noise generated in one circuit forming region is transmitted to another via the seal ring, which acts as a noise transmission path, and there is a risk of moisture entering the circuit forming region.
Innovation Solution
A semiconductor device with a guard ring that penetrates through the interface between insulating interlayer groups formed by different materials and is provided apart from the semiconductor substrate, preventing noise transmission and moisture ingress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the seal ring is formed by interconnect and via plug same as circuit forming region, then the seal ring can be integrated with the circuit structure, but noise is transmitted from one circuit forming region to another via the seal ring
Solution Approach 1:
The seal ring is segmented into multiple portions: a first seal ring portion formed by interconnect and via plug integrated with the circuit structure, and a second seal ring portion formed by conductive filler material in grooves. This segmentation allows the first portion to provide structural integration while the second portion provides noise shielding without being part of the active circuit, thus resolving the noise transmission problem while maintaining manufacturing integration.
Solution Approach 2:
A ground potential layer is introduced as an intermediary between the seal ring and the circuit forming regions. This ground layer acts as a noise sink, intercepting any noise signals that might otherwise propagate through the seal ring to adjacent circuits, thereby eliminating the harmful noise transmission effect while preserving the seal ring's protective function.
2Reliability
If the seal ring is provided to surround the circuit forming region, then moisture or ions can be prevented from entering the circuit forming region, but the seal ring may still allow moisture entry through interfaces between insulating interlayer groups
Solution Approach 1:
Grooves are formed at the interfaces between insulating interlayer groups before final sealing, and conductive filler material is deposited into these grooves to create the second seal ring portion. This preliminary action addresses potential moisture entry paths at interfaces before they can compromise the circuit, enhancing the overall sealing effectiveness.
Solution Approach 2:
The seal ring uses composite construction combining traditional interconnect materials (first seal ring portion) with conductive filler material (second seal ring portion). This composite structure provides both structural integration and enhanced noise shielding, while the grooves filled with conductive material specifically address moisture entry risks at insulating layer interfaces.
3Object-generated harmful factors
If the guard ring is provided apart from the semiconductor substrate, then noise transmission is prevented, but the manufacturing process becomes more complex
Solution Approach 1:
The seal ring structure is merged with the existing interconnect and via plug formation processes. The first seal ring portion uses the same interconnect and via plug structures as the circuit forming region, and the second seal ring portion uses conductive filler material that can be deposited using standard semiconductor manufacturing techniques. This merging approach minimizes additional process complexity while achieving noise transmission prevention.
Data Source
AI summary
A semiconductor device 1 includes a semiconductor substrate 10, insulating interlayer group 20 (first insulating interlayer group), insulating interlayer group 30 (second insulating interlayer group), and seal ring 40 (guard ring). The insulating interlayer group 20 is formed on the semiconductor substrate 10. The insulating interlayer group 30 is formed on the insulating interlayer group 20. The insulating interlayer group 30 is formed by an insulating material having a lower dielectric constant than that of the insulating interlayer group 20. The seal ring 40 is provided so as to surround the circuit forming regions D11 and D12. The seal ring 40 penetrates through the interface between the insulating interlayer group 20 and the insulating interlayer group 30 and is provided apart from the semiconductor substrate 10.


