Programmable Guard Tag Mapping for Memory Safety
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Solution Overview
Problem
Memory-related errors in compiled code, particularly in memory-unsafe languages like C and C++, are prevalent and vulnerable to exploitation, leading to unpredictable behavior and potential security threats due to the lack of runtime error checks.
Innovation Solution
Implementing a tag-guarded memory access mechanism within the instruction set architecture, where guard tags are stored with memory blocks and compared with address tags during access, to detect and prevent memory-related errors, using instructions like multiple guard tag setting and tag-guarded memory access operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If guard tags are stored in a fixed mapping of storage locations, then memory safety detection is improved, but memory flexibility and adaptability deteriorate
Solution Approach 1:
The patent implements a dynamic mapping mechanism where the guard tag storage locations are no longer fixed but can be programmably configured. The memory access circuitry determines the mapping at runtime based on a programmable mapping structure, allowing the system to adapt to different memory layouts and configurations while maintaining reliable guard tag storage and comparison functionality.
2Reliability
If multiple guard tags are set sequentially, then memory safety coverage is improved, but operation time and productivity deteriorate
Solution Approach 1:
The patent combines multiple guard tag setting operations into a single atomic instruction. The multiple guard tag setting instruction allows the memory access circuitry to set guard tags for multiple memory blocks simultaneously in one operation, rather than sequentially, thereby reducing the time required while maintaining comprehensive memory safety coverage.
Solution Approach 2:
The patent ensures continuous and efficient guard tag setting by implementing the multiple guard tag setting instruction that can configure tags for multiple blocks in a single continuous operation. This eliminates the interruptions and sequential delays associated with individual tag setting operations, maintaining productive system operation while achieving thorough memory safety initialization.
3Reliability
If runtime error checks are added to memory access, then memory safety is improved, but processing speed and productivity deteriorate
Solution Approach 1:
The patent performs preliminary action by setting guard tags for memory blocks before actual data access operations occur. The multiple guard tag setting instruction initializes the safety mechanism in advance, so that when memory access occurs, the guard tag comparison can proceed immediately without delay, as the protective infrastructure is already in place and configured.
Data Source
AI summary
An apparatus comprises processing circuitry to perform data processing in response to instructions, and memory access circuitry to perform a tag-guarded memory access operation in response to a target address. The tag-guarded memory access operation comprises comparing an address tag associated with the target address with a guard tag stored in a memory system in association with a block of one or more memory locations comprising an addressed location identified by the target address, and generating an indication of whether a match is detected between the guard tag and the address tag. The memory access circuitry determines, according to a programmable mapping, a mapping of guard tag storage locations for storing guard tags for corresponding blocks of memory locations.